• Journal of the Korea Society of Computer and Information
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• 제29권1호
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• pp.51-59
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• 2024

In this paper, we propose a novel traffic safety system designed to reduce pedestrian traffic accidents and enhance safety on university campuses. The system involves real-time detection of vehicle speeds in designated areas and the interaction between vehicles and pedestrians at crosswalks. Utilizing the YOLOv5s model and Deep SORT method, the system performs speed measurement and object tracking within specified zones. Second, a condition-based output system is developed for crosswalk areas using the YOLOv5s object detection model to differentiate between pedestrians and vehicles. The functionality of the system was validated in real-time operation. Our system is cost-effective, allowing installation using ordinary smartphones or surveillance cameras. It is anticipated that the system, applicable not only on university campuses but also in similar problem areas, will serve as a solution to enhance safety for both vehicles and pedestrians.

• KEPCO Journal on Electric Power and Energy
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• 제2권4호
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• pp.577-582
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• 2016

This Study focused on the development of SMPS (Switching Mode Power Supply) to supply the constant votage and current nevertheless LED fluorescent Light generated the electric noise (with Harmonics) and Inrush current at instant time of turn-on and off. Recently, according to the Green policy in government, the LED fluorescent Lighter showed the rapidly increasing tend as indoor and outdoor Lighter. But, because of costs, LED fluorescent Light not considered and neglected the following items; power factor, efficiency, Harmonics and Inrush current. So, we are developed the SMPS about 3 key issues as follows: 1st, power factor and efficiency is 85%. 2nd, the switching noisy by harmonic is minimized. 3rd, the Inrush current at turn on and off time is reduced the minimum 0.3 A after $100{\mu}sec$ on turnon time. The proposed SMPS adjusted by LNK 409 driver (included the high frequency modulation function). Although, the developed SMPS maintained the about 85% of power factor and efficiency. but, the SMPS must be generated low heat by the variation of minute load current at switching timing. To improve the above weak point, the developed SMPS have the feedback monitoring circuit between input side and output side to maintain the power factor and efficiency. Also, we are studied the time-constant of control circuit to output the constant voltage and current nevertheless the load disturbance of LED lighting. The LED fluorescent Light of 46W is checked the above items.

• Journal of the Korean Graphic Arts Communication Society
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• 제27권1호
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• pp.29-47
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• 2009

Generally, if RGB image is sent to the printer when we print a digital photograph, the printer will convert RGB to CMYK by the inner built-in drive. Because the difference between color domain of RGB and CMYK will cause that change and difference. The most common way to solve the problem is to convert colors by using ICC profile at RIP software or to adapt automatic color converting from the software of the original printer. So we intended to study show which way is most efficient to the digital output and which color mode device is the best based on the printer's own drive in this paper. we tried to observe and check the extended range of color space such as AdobeRGB as well as CMYK and sRGB. Then we made sure which is the suitable color space. Besides, When we convert RGB mode into CMYK mode by utilizing RIP software and adapt the printer's ICC profile made by our selves, we evaluated the output we get and compared the result with extended RGB image. The results are as follows. In case of RGB mode, the printer requests RGB, and that makes the color space more efficient than CMYK's. Converted to CMYK by utilizing RIP software, the chroma is more linearized than the one produced with its' own driver. Compared with sRGB mode's color gamut, AdobeRGB mode's color gamut and CMYK mode's color, CMYK mode's color gamut is the smallest among 3 of them. CMYK mode's color gamut by utilizing RIP software can be changeable. that can be small and narrow or wide and broad. In other words, the volume of color gamut depends on how CMYK is linearized. The color space of sRGB is more advantageous than the one of AdobeRGB in color-reproduction printed. But in the group $-b^*$, the chroma leaves behind in terms of reproduction, In the group of $-a^*$, the chroma is excellent relatively. Visual evaluation of the image, AdobeRGB image has not many reproduction colors. Specially, according to printers' characteristics, Group B of AdobeRGB and sRGB color space is a long way behind In terms of reproduction but Group Y is excellent relatively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제23권9호
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• pp.1079-1086
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• 2012

In this paper, X-band 60 W Solid-State Power Amplifier with sequential control circuit and pulse width variation circuit for improve bias of SSPA module was designed. The sequential control circuit operate in regular sequence drain bias switching of GaAs FET. The distortion and efficiency of output signals due to SSPA nonlinear degradation is increased by making operate in regular sequence the drain bias wider than that of RF input signals pulse width if only input signal using pulsed width variation. The GaAs FETs are used for the 60 W SSPA module which is consists of 3-stage modules, pre-amplifier stage, driver-amplifier stage and main-power amplifier stage. The main power amplifier stage is implemented with the power combiner, as a balanced amplifier structure, to obtain the power greater than 60 W. The designed SSPA modules has 50 dB gain, pulse period 1 msec, pulse width 100 us, 10 % duty cycle and 60 watts output power in the frequency range of 9.2~9.6 GHz and it can be applied to solid-state pulse compression radar using pulse SSPA.

• Journal of the Institute of Electronics and Information Engineers
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• 제53권5호
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• pp.87-97
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• 2016

This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.

• Journal of the Institute of Electronics Engineers of Korea SC
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• 제45권2호
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• pp.26-36
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• 2008

Due to the differential and low voltage swing, Low Voltage Differential Signaling(LVDS) has been widely used for high speed data transmission with low power consumption. This paper proposes new LVDS I/O interface circuits for more than 1.3 Gb/s operation. The LVDS receiver proposed in this paper utilizes a sense amp for the pre-amp instead of a conventional differential pre-amp. The proposed LVDS allows more than 1.3 Gb/s transmission speed with significantly reduced driver output voltage. Also, in order to further improve the power consumption and noise performance, this paper introduces an inductance impedance matching technique which can eliminate the termination resistor. A new form of unfolded impedance matching method has been developed to accomplish the impedance matching for LVDS receivers with a sense amplifier as well as with a differential amplifier. The proposed LVDS I/O circuits have been extensively simulated using HSPICE based on 0.35um TSMC CMOS technology. The simulation results show improved power gain and transmission rate by ${\sim}12%$ and ${\sim}18%$, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제42권5호
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• pp.31-38
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• 2005

The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제46권9호
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• pp.7-13
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• 2009

This paper presents a multi-channel transceiver that achieves a data rate of 3.125Gb/s/ch. The LVDS is used because of its noise immunity and low power consumption. And a pre-emphasis circuit is also proposed to increase the transmitter speed. On the receiver side, a low-power CDR(clock and data recovery) using 1/4-rate clock based on dual-interpolator is proposed. The CDR generates needed additional clocks in each recovery part internally using only inverters. Therefore each part can be supplied with the same number of 1/4-rate clocks from a clock generator as in 1/2-rate clock method. Thus, the reduction of a clock frequency relaxes the speed limitation and lowers power dissipation. The prototype chip is comprised of two channels and was fabricated in a $0.18{\mu}m$ standard CMOS process. The output jitter of transmitter is loops, peak-to-peak(0.31UI) and the measured recovered clock jitter is 47.33ps, peak-to-peak which is equivalent to 3.7% of a clock period. The area of the chip is $3.5mm^2$ and the power consumption is about 119mW/ch.

• Journal of the Korean Society for Nondestructive Testing
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• 제22권5호
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• pp.490-499
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• 2002

Recently, gamma radiographic equipments have been used about 1,000 sets manually and operated by about 2,500 persons in Korea. In order for a radiography to work effectively with avoiding any hazard of the high level radiation from the source, many field workers have expected developing a wireless automatic remote exposure controller. The KlTCO research team has developed an automatic remote exposure controller that can regulate the speed of $0.4{\sim}1.2m/s$ by BLDC motor of 24V 200W which has output of $54kgf{\cdot}cm$, suitable torque and safety factor for the work. And the developed automatic remote exposure controller can control rpm of motor, pigtail position by photo-sensor and exposure time by timer to RF sensor. Thus, the developed equipment is expected that the unit can be used in many practical applications with benefits in economical advantage to combine the use of both automatic and manual type because attachment is possible existent manual remote exposure controller, AC and DC combined use.

• Journal of IKEEE
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• 제18권4호
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• pp.471-477
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• 2014

In this paper, we propose a low-cost license plate recognition system based on smart cam system using Android. The proposed system consists of a portable device and server. Potable device Hardware consists of ARM Cortex-A9 (S5PV210) processor control unit, a power supply device, wired and wireless communication, input/output unit. We develope Linux kernel and dedicated device driver for WiFi module and camera. The license plate recognition algorithm is consisted of setting candidate plates areas with canny edge detector, extracting license plate number with Labeling, recognizing with template matching, etc. The number that is recognized by the device is transmitted to the remote server via the user mobile phone, and the server re-transfer the vehicle information in the database to the portable device. To verify the utility of the proposed system, user photographs the license plate of any vehicle in the natural environment. Confirming the recognition result, the recognition rate was 95%. The proposed system was suitable for low cost portable license plate recognition device, it enabled the stability of the system when used long time by using the Android operating system.