• Title/Summary/Keyword: on-state resistance

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A Review of Studies on Antibiotic Course and Antibiotic Resistance in Nasopharyngeal Pathogens in Primary Care Setting (일차진료 항생제 치료기간과 비인두 항생제 내성률에 대한 연구 고찰)

  • Shin, Hyang Hwa;Lee, Sun Haeng;Yun, Sung Joong;Chang, Gyu Tae
    • The Journal of Pediatrics of Korean Medicine
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    • v.32 no.2
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    • pp.64-71
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    • 2018
  • Objectives The purpose of this study is to examine the correlation of antibiotics administration duration and antimicrobial resistance by reviewing domestic and foreign literatures. Methods We searched literatures dated up to 23 February, 2018 in PubMed and Cochrane Library using terms of "Anti-Bacterial Agents", "Carrier State", "Nasopharynx", "Drug Administration Schedule", and also searched via RISS (Research Information Service System), KISS (Koreanstudies Information Service System), DBpia (DataBase Periodical Information Academic) using terms of antibiotics, resistance, and dose. Results In comparison with shortened and standard antibiotic course, longer treatment duration is associated with greater antimicrobial resistance or non-significant difference, but we cannot find literature that shortened antibiotic course increases antimicrobial resistance on human nasopharyngeal flora. Conclusions Currently, there is no evidence that completing the standard antibiotic course reduces antimicrobial resistance. It can be a strategy for reducing antibiotic use to apply Korean medicine treatment, as well as short-course antibiotic therapy or delayed antibiotic prescription. Additional well-designed trials should be conducted in domestic and foreign settings about the appropriate duration of antibiotic therapy.

Influence of Series Resistance and Interface State Density on Electrical Characteristics of Ru/Ni/n-GaN Schottky structure

  • Reddy, M. Siva Pratap;Kwon, Mi-Kyung;Kang, Hee-Sung;Kim, Dong-Seok;Lee, Jung-Hee;Reddy, V. Rajagopal;Jang, Ja-Soon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.5
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    • pp.492-499
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    • 2013
  • We have investigated the electrical properties of Ru/Ni/n-GaN Schottky structure using current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. The barrier height (${\Phi}_{bo}$) and ideality factor (n) of Ru/Ni/n-GaN Schottky structure are found to be 0.66 eV and 1.44, respectively. The ${\Phi}_{bo}$ and the series resistance ($R_S$) obtained from Cheung's method are compared with modified Norde's method, and it is seen that there is a good agreement with each other. The energy distribution of interface state density ($N_{SS}$) is determined from the I-V measurements by taking into account the bias dependence of the effective barrier height. Further, the interface state density $N_{SS}$ as determined by Terman's method is found to be $2.14{\times}10^{12}\;cm^{-2}\;eV^{-1}$ for the Ru/Ni/n-GaN diode. Results show that the interface state density and series resistance has a significant effect on the electrical characteristics of studied diode.

Estimation of Pile Resistance Factor by CPT Based Pile Capacity (CPT결과를 이용한 항타말뚝 지지력 평가를 위한 저항계수 산정)

  • Kim Dae-Ho;Lee Jun-Hwan;Kim Bum-Joo
    • Journal of the Korean Geotechnical Society
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    • v.21 no.10
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    • pp.113-122
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    • 2005
  • Application of Limit State Design in geotechnical engineering has become world-widely popular. While LRFD code in the North America presents geotechnical load and resistance factors, the values of resistance factors proposed by these methods are still unstable with limited application. CPT has been widely used for the pile design and various methods have been proposed to estimate the bearing capacity of piles. In this paper, resistance factors for representative pile design methods based on CPT results are evaluated. Field pile load test and CPT results were collected and analyzed in order to obtain necessary statistical data and resistance factors. Resistance factors of the base, shaft, and total capacity are estimated. From fisrt order second moment (FOSM) analysis, resistance factors of $0.30{\sim}0.55$ are estimated for total load capacity.

Characteristics of Transient Overvoltages for the Towers with Time Varying Tower Footing Resistance

  • Kwak, Hee-Ro
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.33 no.3
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    • pp.118-124
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    • 1984
  • This paper investigated the characteristics of transient overvoltages on the tower caused by time varying tower footing resistance in the path of lightning stroke current entering earth on transmission lines. The tower with time varying tower footing resistance was simulated and the transient overvoltageson the tower due to lightning stroke current were computer by Nodal Solution Method. From the results, it was found that the determination of the steady state values as a limit of inductive tower footing resistance causes higher transient overvoltages than CFO voltages of insulator strings and V-T characteristics of the insulator strings should be considered for computation of backflashover rate.

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Study on Design of 60 V TDMOSFET for Protection Circuit Module (Protection Circuit Module에 최적화된 60 V급 TDMOSFET 최적화 설계에 관한 연구)

  • Lee, Hyun-Woong;Jung, Eun-Sik;Oh, Reum;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.5
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    • pp.340-344
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    • 2012
  • Protected Circuit Module protects battery from over-charge and over-discharge, also prevents accidental explosion. Therefore, power MOSFET is essential to operate as a switch within the module. To reduce power loss of MOSFET, the on state voltage drop should be lowered and the switching time should be shorted. However there is trade-off between the breakdown voltage and the on state voltage drop. The TDMOS can reduce the on state voltage drop. In this paper, effect of design parameter variation on electrical properties of TDMOS, were analyzed by computer simulation. According to the analyzed results, the optimization was performed to get 65% higher breakdown voltage and 17.4% on resistance enhancement.

A Study on the Design and Electrical Characteristics Enhancement of the Floating Island IGBT with Low On-Resistance

  • Jung, Eun-Sik;Cho, Yu-Seup;Kang, Ey-Goo;Kim, Yong-Tae;Sung, Man-Young
    • Journal of Electrical Engineering and Technology
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    • v.7 no.4
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    • pp.601-605
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    • 2012
  • Insulated Gate Bipolar Transistors(IGBTs) have received wide attention because of their high current conduction and good switching characteristics. To reduce the power loss of IGBT, the onstate voltage drop should be lowered and the switching time should be shortened. However, there is trade-off between the breakdown voltage and the on-state voltage drop. The FLoatingIsland(FLI) structure can lower the on-state voltage drop without reducing breakdown voltage. In this paper, The FLI IGBT shows an on-state voltage drop that is 22.5% lower than the conventional IGBT, even though the breakdown voltages of each IGBT are almost identical.

The Concepts and the Applications of Load and Resistance Factor Design and Partial Safety Factor Based on the Reliability Engineering (신뢰성공학에 근거한 하중-강도계수 설계법과 부분안전계수의 개념 및 적용)

  • Yoo, Yeon-Sik;Kim, Tae-Wan;Kim, Jong-In
    • Proceedings of the KSME Conference
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    • 2007.05a
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    • pp.309-314
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    • 2007
  • Recently, the LRFD and the PSF based on structural reliability assessment have been applied to NPP designs in behalf of the conventional deterministic design methods. In the risk-informed structural integrity, it is especially possible to optimize design procedures considering cost, manufacturing and maintenance because the structural reliability concepts have confirmed the reliability for which a designer aims. Generally, in order to evaluate the PSF, the LRFD which is the design concept for evaluating safety factors respectively on the limit state function including load and resistance. This study certifies the concept and its applications of the PSF using the LRFD based on the structural reliability engineering.

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Effect of silica fume and polyepoxide-based polymer on electrical resistivity, mechanical properties, and ultrasonic response of SCLC

  • Mazloom, Moosa;Allahabadi, Ali;Karamloo, Mohammad
    • Advances in concrete construction
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    • v.5 no.6
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    • pp.587-611
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    • 2017
  • This study focused on the influences regarding the use of polyepoxide-based polymer and silica fume (SF) on the fresh and hardened state properties of self-compacting lightweight concrete (SCLC) along with their impacts on electrical resistance and ultrasonic pulse velocity (UPV). To do so, two series of compositions each of which consists of twelve mixes, with water to binder (W/B) ratios of 0.35 and 0.4 were cast. Three different silica fume/binder ratios of 0, 5%, and 10% were considered along with four different polymer/binder ratios of 0, 5%, 10%, and 15%. Afterwards, the rupture modulus, tensile strength, 14-day, 28-day, and 90-day compressive strength, the UPV and the electrical resistance of the mixes were tested. The results indicated that although the use of polymer could enhance the passing and filling abilities, it could lead to a decrease of segregation resistance. In addition, the interaction of the SF and the polymeric contents enhanced the workability. However, the impacts regarding the use of polymeric contents on fresh state properties of SCLC were more prevalent than those regarding the use of SF. Besides the fresh state properties, the durability and mechanical properties of the mixes were affected due to the use of polymeric and SF contents. In other words, the use of the SF and the polymer enhanced the durability and mechanical properties of SCLC specimens.

A Study on the Impedance Effect of Nonvolatile SNOSEFT EFFPROM Memory Devices (비휘발성 SNOSEFT EFFPROM 기억소자의 임피던스 효과에 관한 연구)

  • 강창수;김동진;김선주;이상배;이성배;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.05a
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    • pp.86-89
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    • 1995
  • In this pacer, The effect of the impedances in SNOSEFT s memory devices has been developed. The effect of source and drain impedances are measuring using the method of the field effect bias resistance in the inner resistance regions of the device structure and external bias resistance. The effect of impedance by source and drain resistance shows according to increasing to the storage of memory charges, shows according to a function of decreasing to the gate voltages, shows the delay of threshold voltages, The delay time of low conductance state and high conductance state by the impedance effect shows 3 [${\mu}$sec] and 1[${\mu}$sec] respectively.

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Electrical Characteristics of High-Voltage LDMOSFET Fabricated by CMOS Technology (CMOS 공정으로 구현한 고전압 LDMOSFET의 전기적 특성)

  • Park, Hoon-Soo;Lee, Young-Ki;Kwon, Young-Kyu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.201-202
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    • 2005
  • The electrical characteristics of high-voltage LDMOSFET (Lateral Double-diffused MOSFET) fabricated by a CMOS technology were investigated depending on the process and design parameters. The off-state breakdown voltages of n-channel LDMOSFETs were linearly increased with increasing to the drift region length. For the case of decreasing n-well ion implant doses from $1.0\times10^{13}/cm^2$ to $1.0\times10^{12}/cm^2$, the off-state breakdown voltage was increased approximately two times, however, the on-resistance was also increased about 76%. Moreover, the on- and off-state breakdown voltages were also linearly increased with increasing the channel to n-tub spacing due to the reduction of impact ionization at the drift region.

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