Electrical Characteristics of High-Voltage LDMOSFET Fabricated by CMOS Technology

CMOS 공정으로 구현한 고전압 LDMOSFET의 전기적 특성

The electrical characteristics of high-voltage LDMOSFET (Lateral Double-diffused MOSFET) fabricated by a CMOS technology were investigated depending on the process and design parameters. The off-state breakdown voltages of n-channel LDMOSFETs were linearly increased with increasing to the drift region length. For the case of decreasing n-well ion implant doses from $1.0\times10^{13}/cm^2$ to $1.0\times10^{12}/cm^2$, the off-state breakdown voltage was increased approximately two times, however, the on-resistance was also increased about 76%. Moreover, the on- and off-state breakdown voltages were also linearly increased with increasing the channel to n-tub spacing due to the reduction of impact ionization at the drift region.