• 대한의용생체공학회:의공학회지
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• 제36권5호
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• pp.169-176
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• 2015

Implantable closed-loop epilepsy controllers require ideally both accurate epileptic seizure detection and low power consumption. On-chip oscillators can be used in implantable devices because they consume less power than other oscillators such as crystal oscillators. In this study, we investigated the tolerable error range of a lower power on-chip oscillator without losing the accuracy of seizure detection. We used 24 ictal and 14 interictal intracranial electroencephalographic segments recorded from epilepsy surgery patients. The performance variations with respect to oscillator frequency errors were estimated in terms of specificity, modified sensitivity, and detection timing difference of seizure onset using Generic Osorio Frei Algorithm. The frequency errors of on-chip oscillators were set at ${\pm}10%$ as the worst case. Our results showed that an oscillator error of ${\pm}10%$ affected both specificity and modified sensitivity by less than 3%. In addition, seizure onsets were detected with errors earlier or later than without errors and the average detection timing difference varied within less than 0.5 s range. The results suggest that on-chip oscillators could be useful for low-power implantable devices without error compensation circuitry requiring significant additional power. These findings could help the design of closed-loop systems with a seizure detector and automated stimulators for intractable epilepsy patients.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.149-167
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• 2004

Passive components are indispensable in the design and development of microchips for high-frequency applications. Inductors in particular are used frequently in radio frequency (RF) IC's such as low-noise amplifiers and oscillators. This paper gives a broad overview on the on-chip spiral inductors. The design concept and modeling approach of the typical square-shaped spiral inductor are first addressed. This is followed by the discussions of advanced structures for the enhancement of inductor performance. Research works reported in the literature are summarized to aid the understanding of the recent development of such devices.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.387-390
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• 1998

In this paper, HBT's with lower phase noise and passive elements, such as resistors, capacitors and inductors, for resonance and impedance matching networks are designed, fabricated, tested, and carefully analysed, respectively, and then, they are integrated for the design and fabrication of functional X-band oscillators with lower phase noise. Epi-wafers for HBT's with the structure of graded $Al_{x}$G $a_{1-x}$ As emitter and C-doped base layer of 700.angs. thick were used to specially emphasize the improvement of $f_{T}$ and $f_{max}$, and the lowering of phase noise, in design aspects. At the test frequencies of 12GHz, capacitances of MIM capacitors, spiral inductor, and resistances are 0.5~10pF, 0.4~11.06nH, and 20~1,380.ohm., respectively. The emitter size of HBY's for the X-band MMIC oscillators is 3*10u $m^{2}$, and find chip size is 0.9*0.9m $m^{2}$..EX>.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.485-486
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• 2006

This paper proposes a novel low-cost CMOS temperature sensor for controlling the self-refresh period of a mobile DRAM. In this temperature sensor, ring oscillators composed of cascaded inverter stages are used to obtain the temperature of the chip. This method is highly area-efficient, simple and easy for IC implementation as compared to traditional temperature sensors based on analog bandgap reference circuits. The proposed CMOS temperature sensor was fabricated with 80 nm 3-metal DRAM process. It occupies a silicon area of only about less than $0.02\;mm^2$ at $10^{\circ}C$ resolution with under 5uW power consumption at 1 sample/s processing rate. This area is about 33% of conventional temperature sensor in mobile DRAM.

• 한국통신학회논문지
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• 제24권8A호
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• pp.1252-1258
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• 1999

본 논문에서는 10-MHz 대역폭을 갖는 무선가입자망용 중간주파수 아날로그 IC 설계에 관하여 논한다. 본 IC는 RF 부와 MODEM사이에서 인터페이스 역할을 하며, 수신 단에서는 중간주파수 신호를 기저대역으로 저역변환을 하고 송신 단에서는 기저대역 신호를 중간주파수 신호로 바꾸어 준다. 본 회로는 이득조절증폭기, 위상잠금회로, 저역통과필터, 아날로그-디지털 및 디지털-아날로그 변환기로 구성된다. 위상잠금회로에서 전압발진기 및 분주기, 위상비교기, 전하펌핑회로는 동일 칩 안에 구현하였고, 외부소자로는 루프필터용 소자와 LC 탱크 소자만이 사용되었다. 본 IC는 0.6-$\mu\textrm{m}$ CMOS 공정에 의하여 제작되었고, 전체 크기는 4 mm $\times$ 4 mm 이며, 3.3 V에서 약 57mA를 소모하였다.

• 한국통신학회논문지
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• 제38A권12호
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• pp.991-997
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• 2013

본 논문에서는 아날로그필터를 위한 새로운 구조의 주파수 제어 방식(frequency tuning scheme)과 트랜스컨덕턴스(gm) 가변 범위가 넓은 트랜스컨덕터(OTA: Operational transconductor amplifier) 회로를 제안하였다. 제안된 주파수 제어 방식은 트랜스컨덕터와 커패시터로 구성된 1차 저역통과필터의 시정수와 커패시터에 일정 전압이 충전되는데 걸리는 시간과의 관계식을 이용한 것으로 전압제어필터 방식과 유사하게 간단한 구조를 가지며, 기준신호로 순수 정현파를 필요로 하지 않고, 시스템 클럭 또는 외부 수정 발진 회로를 통해 쉽게 얻을 수 있는 클럭 펄스를 사용할 수 있다는 장점이 있다. 또한, 클럭 주파수가 고정된 조건에서도 복잡한 구조의 커패시터 어레이를 사용하지 않고 다중 대역 지원을 목적으로 차단 주파수를 가변하면서 제어할 수 있다. 그리고 모의 실험을 통해 제안된 자동 주파수 제어회로의 동작을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.745-753
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• 2016

This paper presents a fully synthesizable low power interconnect bus for millimeter-scale wireless sensor nodes. A segmented ring bus topology minimizes the required chip real estate with low input/output pad count for ultra-small form factors. By avoiding the conventional open drain-based solution, the bus can be fully synthesizable. Low power is achieved by obviating a need for local oscillators in member nodes. Also, aggressive power gating allows low-power standby mode with only 53 gates powered on. An integrated wakeup scheme is compatible with a power management unit that has nW standby mode. A 3-module system including the bus is fabricated in a 180 nm process. The entire system consumes 8 nW in standby mode, and the bus achieves 17.5 pJ/bit/chip.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권3호
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• pp.210-220
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• 2008

We review three examples (an on-chip transmission line resonator [1], a phase-locked loop [2], and an analog-to-digital converter [3]) of design tradeoffs which can in fact be circumvented; the key in each case is that the parameters that seem to trade off with each other are actually separated in time or space. This paper is an attempt to present these designs in such a way that this common approach can hopefully be applied to other circuits. We note reader that this paper is not a new contribution, but a review in which we highlight the common theme from our published works [1-3]. We published a similar paper [4], which, however, used only two examples from [1] and [2]. With the newly added content from [3] in the list of our examples, the present paper offers an expanded scope.