JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Surpassing Tradeoffs by Separation: Examples in Transmission Line Resonators, Phase-Locked Loops, and Analog-to-Digital Converters

  • Sun, Nan (School of Engineering and Applied Sciences, Harvard University) ;
  • Andress, William F. (School of Engineering and Applied Sciences, Harvard University) ;
  • Woo, Kyoung-Ho (School of Engineering and Applied Sciences, Harvard University) ;
  • Ham, Don-Hee (School of Engineering and Applied Sciences, Harvard University)
  • Published : 2008.09.30
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Abstract

We review three examples (an on-chip transmission line resonator [1], a phase-locked loop [2], and an analog-to-digital converter [3]) of design tradeoffs which can in fact be circumvented; the key in each case is that the parameters that seem to trade off with each other are actually separated in time or space. This paper is an attempt to present these designs in such a way that this common approach can hopefully be applied to other circuits. We note reader that this paper is not a new contribution, but a review in which we highlight the common theme from our published works [1-3]. We published a similar paper [4], which, however, used only two examples from [1] and [2]. With the newly added content from [3] in the list of our examples, the present paper offers an expanded scope.

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References

  1. W. Andress and D. Ham, "Standing wave oscillators utilizing wave-adaptive tapered transmission lines," IEEE J. Solid-State Circ., Vol.40, No.3, pp.638-651, March 2005 https://doi.org/10.1109/JSSC.2005.843600
  2. K. Woo, Y. Liu, E. Nam, and D. Ham, "Fast-lock hybrid PLL combining fractional-N & integer-N modes of differing bandwidths," IEEE J. Solid-State Circ., Vol.43, No.2, pp.379-389, February 2008 https://doi.org/10.1109/JSSC.2007.914281
  3. N. Sun and D. Ham, 'Digital acceleration of correlation- based digital background calibration in pipelined ADCs,' Technical Report, Harvard University, August 2008. This report is available at http://www. seas.harvard.edu/~donhee/digia.pdf
  4. W. Andress, K. Woo, and D. Ham, "Surpassing tradeoffs by separation: examples in frequency generation circuits," SiRF, January 2008
  5. Crowley, "Phase locked loop with variable gain and bandwidth," US Patent 4,156,855, May 29th, 1979
  6. J. Li and U. Moon, "A background calibration techniques for multi-stage pipelined ADCs with digital redundancy," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., Vol.50, No.9, pp.531-538, Sept. 2003 https://doi.org/10.1109/TCSII.2003.816921
  7. M. Taherzadeh-Sani and A. A. Hamoui, "Digital background calibration of capacitor-mismatch errors in pipelined ADCs," IEEE Trans. Circuits Syst. II, Brief Papers, Vol.53, No.9, pp.966-970, Sept. 2006 https://doi.org/10.1109/TCSII.2006.879097
  8. R. Jewett, K. Poulton, K. Hsieh, and J. Doernberg, "A 12-b 128M samples/s ADC with 0.05LSB DNL," Proc Int. Solid-State Circuits Conf., pp.138-139, Feb. 1997
  9. J. Ming and S. Lewis, "An 8-bit 80-Msample/s pipelined analog-to-digital converter with background calibration," IEEE J. Solid-Sate Circuits, Vol.36, No.9, pp.1489-1497, Oct. 2001 https://doi.org/10.1109/4.953477
  10. I. Galton, "Digital cancellation of D/A converter noise in pipelined A/D converters," IEEE Trans. Circuits Syst. II, Vol.47, pp.185-196, Mar. 2000 https://doi.org/10.1109/82.826744
  11. E. Siragusa and I. Galton, "A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC," IEEE J. Solid-State Circuits, Vol.39, pp.2126-2138, Dec. 2004 https://doi.org/10.1109/JSSC.2004.836230
  12. K. El-Sankary and M. Sawan, "A digital blind background capacitor mismatch calibration for pipelined ADC," IEEE Trans. Circuits Syst. II, Exp. Briefs, Vol.51, No.10, pp.507-510, Oct. 2004 https://doi.org/10.1109/TCSII.2004.836056
  13. A. Panigada and I. Galton, "Digital background correction of harmonic distortion in pipelined ADCs," IEEE Trans. Circuits Syst. I, Regular Papers, Vol.53, No.9, pp.1885-1895, Sept. 2006 https://doi.org/10.1109/TCSI.2006.880034