• Journal of Powder Materials
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• v.28 no.5
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• pp.423-428
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• 2021

Here, we report the development of a new and low-cost core-shell structure for lithium-ion battery anodes using silicon waste sludge and the Ti-ion complex. X-ray diffraction (XRD) confirmed the raw waste silicon sludge powder to be pure silicon without other metal impurities and the particle size distribution is measured to be from 200 nm to 3 ㎛ by dynamic light scattering (DLS). As a result of pulverization by a planetary mill, the size of the single crystal according to the Scherrer formula is calculated to be 12.1 nm, but the average particle size of the agglomerate is measured to be 123.6 nm. A Si/TiO₂ core-shell structure is formed using simple Ti complex ions, and the ratio of TiO₂ peaks increased with an increase in the amount of Ti ions. Transmission electron microscopy (TEM) observations revealed that TiO₂ coating on Si nanoparticles results in a Si-TiO₂ core-shell structure. This result is expected to improve the stability and cycle of lithium-ion batteries as anodes.

• Korean Journal of Materials Research
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• v.14 no.6
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• pp.399-401
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• 2004

InGaAs/GaAs quantum wire structures were grown by low pressure metalorganic chemical vapor deposition by using selective area epitaxy.$ In_{ 0.2}$$Ga_{0.8}$ As/GaAs quantum wire structures were grown on a $SiO_2$ masked GaAs substrate. Quantum wire structures with sharp tips and smooth side walls were grown. We have grown InGaAs/GaAs quantum wire structures using variously opened width of the $SiO _2$ mask. Even though the opening widths of $SiO_2$ masked GaAs substrate were different, similar shapes of triangular structures were grown. Using various kinds of differently opened $SiO_2$ masked area, it would be possible to grow quantum wire structures with various thicknesses. The quantum wire structures are formed near the pinnacle of the triangular structure. Therefore, the fabrication of the uniquely designed integrated optical devices which include light emitting sources of multiple wavelength is possible.

• Journal of the Korean Vacuum Society
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• v.16 no.5
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• pp.366-370
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• 2007

Nano-scopic holes which are distributed densely and uniformly were fabricated on $SiO_2$ surface. Self-assembling resists were used to produce a layer of uniformly distributed parallel poly methyl methacrylate (PMMA) cylinders in a polystyrene (PS) matrix. The PMMA cylinders were degraded and removed by acetic acid rinsing. Subsequently, PS nanotemplates were fabricated. The patterned holes of PS template were approximately $8{\sim}30\;nm$ wide, 40 nm deep, and 60 nm apart. The porous PS template was used as a dry etching mask to transfer the pattern of PS template into the silicon oxide thin film during reactive ion etching (RIE) process. The sizes of the patterned holes on $SiO_2$ layer were $9{\sim}33\;nm$. After pattern transfer by RIE, uniformly distributed holes of which size were in the range of $6{\sim}22\;nm$ were fabricated on Si substrate. Sizes of the patterned holes were controllable by PMMA molecular weight.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1345-1346
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• 2007

다양한 게이트 절연막의 펜타신 박막 트랜지스터의 전기적 특성을 atomic force microscope (AFM), X-선 회절을 사용하여 분석하였다. 펜타신 박막 트랜지스터는 thermal evaporator 방법을 사용하여 여러 폴리며 기판위에 제작하였다. Hexamethylsilasane (HMDS), polyvinyl acetate (PVA), polymethyl methacrylate (PMMA)등의 폴리머 기판을 사용하여 다양한 온도에서 증착시켰다. 이 때 PMMA위에 증착시킨 펜타신의 경우가 가장 큰 그레인 크기를 보였고, 가장 적은 트랩 농도를 보였다. 그리고 상부 전극 구조를 가진 박막 트랜지스터를 HMDS 처리를 한 $SiO_2$와 PMMA 절연막을 사용하여 제작하고 비교하였다. 이때 PMMA기판 위에 제작한 트랜지스터는 전계효과 이동도가 ${\mu}_{FET}=0.03cm^{2}/Vs$ 이고, 문턱이전 기울기 0.55V/dec, 문턱전압 $V_{th}=-6V$, on/off 전류비 $>10^5$의 전기적 특성을 보였고, $SiO_2$ 기판위에 제작한 트랜지스터는 전계효과 이동도 ${\mu}_{FET}=0.004cm^{2}/Vs$, 문턱이전 기울기 0.518 V/dec, 문턱전압 $V_{th}=5V$, on/off 전류비 $>10^4$의 전기적 특성을 보였다.

• Transactions on Electrical and Electronic Materials
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• v.11 no.2
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• pp.89-91
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• 2010

Partial discharge (PD) resistances were investigated for three types of samples: original epoxy resins, epoxy micro composites with and without the silane processing, and mixture composites with micro and nano particles. The PD was applied to these materials using rod, gap, and plane electrodes. The partial discharge resistance found in the micro composites was better than that found in the original epoxy resin. Moreover, the mixture composites of $SiO_2$ nano and micro particles had much larger resistances than the original epoxy resin or microcomposites. It can be regarded that this excellent property was due to the fact that the nano particles have a dense structure between the micro particles.

• Journal of the Korean Vacuum Society
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• v.16 no.5
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• pp.359-365
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• 2007

In this paper we present a bottom-gate type of zinc oxide (ZnO) and Gallium (Ga) doped zinc oxide (GZO) based thin film transistors (TFTs) through applying a radio frequency (RF) magnetron sputtering method at room temperature. The gate leakage current can be reduced up to several ph by applying $SiO_2$ thermally grown instead of using new gate oxide materials. The root mean square (RMS) values of the ZnO and GZO film surface were measured as 1.07 nm and 1.65 nm, respectively. Also, the transmittances of the ZnO and GZO film were more than 80% and 75%, respectively, and they were changed as their film thickness. The ZnO and GZO film had a wurtzite structure that was arranged well as a (002) orientation. The ZnO TFT had a threshold voltage of 2.5 V, a field effect mobility of $0.027\;cm^2/(V{\cdot}s)$, a on/off ratio of $10^4$, a gate voltage swing of 17 V/decade and it operated in a enhancement mode. In case of the GZO TFT, it operated in a depletion mode with a threshold voltage of -3.4 V, a field effect mobility of $0.023\;cm^2/(V{\cdot}s)$, a on/off ratio of $2{\times}10^4$ and a gate voltage swing of 3.3 V/decade. We successfully demonstrated that the TFTs with the enhancement and depletion mode type can be fabricated by using pure ZnO and 1wt% Ga-doped ZnO.

• Journal of the Korean Recycled Construction Resources Institute
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• v.9 no.4
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• pp.529-536
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• 2021

In this study, nano-silica and nano-titanium were selected to determine the possibility of applying the binder to reactive nano materials. The basic characteristics of the nano material candidate group were reviewed. and the reactivity of nano materials was reviewed through K-value. The reactivity of the nano silicate materials was measured to be high. Therefore, as a final candidate group, nano silicate materials were selected. The finally selected reactive nano material was reviewed for its usability as a construction binder. The mechanical properties and unit weight of cement paste were reviewed using silica fume and blast furnace slag and nano materials. When cement composites with nano silicate materials, it was confirmed that it was effective in improving the mechanical performance and decrease the unit weight of cement composites.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.35-37
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• 2005

100, 200nm 크기의 colloidal silica 각각에 나노 ceria 입자를 수열합성법으로 코팅하였다. Colloidal silica 입자에 ceria를 코팅 시 slurry의 pH조절과 수열처리에 이용하여 silica에 ceria가 코팅됨을 TEM과 zeta-potential을 이용하여 확인하였다. 연마 슬러리의 분산 안정성과 연마효율을 높이기 위하여 슬러리의 pH 는 9로 하였으며, 이때의 zeta-potential 값은 -25 mV이었다. 1 wt%로 제조된 연마슬러리를 이용하여, 4 inch $SiO_2$, $Si_3N_4$ wafer를 압력변화에 따른 연마특성을 관찰 하였다. Ceria coated colloidal silica 100 nm, 200 nm와 commercial한 $CeO_2$입자를 연마압력 6 psi로 oxide film을 연마한 결과 연마율이 각각 2490 ${\AA}/min$, 4200 ${\AA}/min$, 4300 ${\AA}/min$으로 측정되었다. 또한 $SiO_2$, $Si_3N_4$ film의 6 psi압력에서 ceria coated colloidal silica 100 nm, 200 nm와 commercial 한 $CeO_2$입자의 선택비는 3, 3.8, 6.7 이었다. 입자크기가 클수록 연마율이 높으며, Preston equation을 따라 연마 압력과 연마율이 비례하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.477-480
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• 2002

Si-O-C(-H) thin film with a tow dielectric constant were deposited on a P-type Si(100) substrate by an inductively coupled plasma chemical vapor deposition (ICPCVD). Bis-trimethylsilymethane (BTMSM, H$_{9}$C$_3$-Si-CH$_2$-Si-C$_3$H$_{9}$) and oxygen gas were used as Precursor. Hybrid type Si-O-C(-H) thin films with organic material have been generated many voids after annealing. Consequently, the Si-O-C(-H) films can be made a low dielectric material by the effect of void. The surface characterization of Si-O-C(-H) thin films were performed by SEM(scanning electron microscope). The characteristic analysis of Si-O-C(-H) thin films were performed by X-ray photoelectron spectroscopy (XPS).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.8
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• pp.712-716
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• 2006

NiCr thin films prepared on $SiO_2/Si$ substrates at room temperature by magnetron co-sputtering technique and then annealed in a vacuum ambient $(3{\times}10^{-6}\;Torr)\;at\;400^{\circ}C$. The grain size and crystallinity of the films increased with film thickness. The resistivity of the films slightly decreases as the film thickness increases, Temperature coefficient resistance (TCR) exhibits positive values irrespective of film thickness and TCR in the range of 50 to 400 nm thickness shows suitable values for the application of 10 dB in ${\pi}-type$ attenuators.