• JSTS:Journal of Semiconductor Technology and Science
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• 제12권3호
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• pp.360-369
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• 2012

The causes of showing different subthreshold slopes (SS) in programmed and erased states for two different charge trap flash (CTF) memory devices, SONOS type flash memory with gate-all-around (GAA) structure and TANOS type NAND flash memory with planar structure were investigated. To analyze the difference in SSs, TCAD simulation and low-frequency noise (LFN) measurement were fulfilled. The device simulation was performed to compare SSs considering the gate electric field effect to the channel and to check the localized trapped charge distribution effect in nitride layer while the comparison of noise power spectrum was carried out to inspect the generation of interface traps ($N_{IT}$). When each cell in the measured two memory devices is erased, the normalized LFN power is increased by one order of magnitude, which is attributed to the generation of $N_{IT}$ originated by the movement of hydrogen species ($h^*$) from the interface. As a result, the SS is degraded for the GAA SONOS memory device when erased where the $N_{IT}$ generation is a prominent factor. However, the TANOS memory cell is relatively immune to the SS degradation effect induced by the generated $N_{IT}$.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.179-182
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• 2007

Polycrystaline (poly) 3C-SiC thin film on n-type and p-type Si were deposited by APCVD using HMDS, $H_2$, and Ar gas at $1180^{\circ}C$ for 3 hour. And then the schottky diode with Au/poly 3C-Sic/Si(n-type) structure was fabricated. Its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) value were measured as 0.84 V, over 140 V, 61nm, and $2.7{\times}10^{19}\;cm^3$, respectively. The p-n junction diode fabricated by poly 3C-SiC was obtained like characteristics of single 3C-SiC p-n junction diode. Therefore, its poly 3C-SiC thin films are suitable MEMS applications in conjuction with Si fabrication technology.

• 반도체디스플레이기술학회지
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• 제11권4호
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• pp.19-23
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• 2012

We report microbolometer characteristic with n-type and p-type amorphous silicon thin film. The n-type and p-type amorphous silicon thin films were made by PECVD. The electrical properties of n-type and p-type a-Si:H thin films were investigated as a function of doping gas flow rate. The doping gas used $B_2H_6/Ar$ (1:9) and $PH_3/Ar$ (1:9). In general, the conductivity of doping a-Si:H thin films increased as doping gas increase but the conductivity of a-Si:H thin films decreased as the doping gas increase because doping gas concentration increase led to dilution gas (Ar) increase as the same time. We fabricated an amorphous silicon microbolometer using surface micromachining technology. The fabricated microbolometer had a negative TCR of 2.3%. The p-type microbolometer had responsivity of $5{\times}10^4V/W$ and high detectivity of $3{\times}10^8cm(Hz)^{1/2}/W$. The p-type microbolometer had more detectivity than n-type for less noise value.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.150-151
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• 2006

$Si_{0.88}Ge_{0.12}$/Si heterostructure channels grown by RPCVD were employed to n-type metal oxide semiconductor field effect transistors(MOSFETs), and their electrical properties were investigated. SiGe nMOSFETs presented very high transconductance compared to conventional Si-bulk MOSFETs, regardless substantial drawbacks remaining in subthreshold-slope, $I_{off}$, and leakage current level. It looks worthwhile to utilize excellent transconductance properties into rf applications requesting high speed and amplification capability, although optimization works on both device structure and unit processes are necessary for enhanced isolation and reduced power dissipation.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.566-567
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• 2009

We have examined the silicon nitride ($SiN_x$) as gate insulator with the ammonia ($NH_3$) plamsa treatment for the soluble derivatives of polythiophene as p-type channel materials of organic thin film transistors (OTFTs). Fabrications of the jetting-processed OTFTs with $SiN_x$ as gate insulator by $NH_3$ plasma treatment can be similar to performance of OTFTs with silicon dioxide ($SiO_2$) insulator.

• 반도체디스플레이기술학회지
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• 제16권2호
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• pp.39-43
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• 2017

It was confirmed that the silicon thin films fabricated on the p-Si (100) substrates by using DIPAS (DiIsoPropylAminoSilane) and TDMA-Sb (Tris-DiMethylAminoAntimony) sources by RPCVD method were amorphous and n-type silicon. The fabricated amorphous n-type silicon films had electron carrier concentrations and electron mobilities ranged from $6.83{\times}10^{18}cm^{-3}$ to $1.27{\times}10^{19}cm^{-3}$ and from 62 to $89cm^2/V{\cdot}s$, respectively. The ideality factor of the pn junction diode fabricated on the p-Si (100) substrate was about 1.19 and the efficiency of the fabricated pn solar cell was 10.87%.

• 반도체디스플레이기술학회지
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• 제4권2호
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• pp.1-5
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• 2005

Electon spin resonance measurements have been performed on the Mg-doped wurtzite GaN thin films grown on sapphire substrates by low-pressure metal-organic chemical vapor deposition. The sample set included films as-grown with the regular Mg doped and Mg delta doped samples and the corresponding annealed ones. The resonance signal has been observed from the annealed Mg delta-doped sample with the Lande g value of 2.029. This indicates that the singlet resonance signal originates from the neutral Mg acceptor located at 0.24 eV above the valence band edge and 0.13 eV above the Fermi level because of the nuclear hyperfine spin 1=0 of Mg and the larger value than the free electron g=2.0023.

• 대한화학회지
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• 제40권3호
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• pp.167-172
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• 1996

GaN 단결정 박막은 halide vapor phase epitaxy(HVPE)방법을 사용하여 사파이어 기판위에 헤케로에피탁시하게 성장시켰다. 이렇게 제조된 박막은 n형 전동성을 갖는다. 아연(Zn)을 받개 불순물로 도핑시켜 절연형 GaN 박막을 만들었는데 2.64과 2.43eV의 청색영역에서 발광 피크를 가졌다. 본 연구에의해 GaN 박막은 MIS(metal-insulator-semiconductor) 접합구조로 제작이 가능함을 시사하였고, 이종접합형 발광소자 개발에 기초자료가 될 것으로 전망된다.

• Safety and Health at Work
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• 제10권3호
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• pp.347-354
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• 2019

Background: The aim of this study was to describe the types of diseases that developed in semiconductor workers who have registered with the Korea Workers' Compensation and Welfare Service (KWCWS) and to identify potential common occupational characteristics by the type of claimed disease. Methods: A total of 55 semiconductor workers with cancer or rare diseases who claimed to the KWCWS were compared based on their work characteristics and types of claimed diseases. Leukemia, non-Hodgkin lymphoma, and aplastic anemia were grouped into lymphohematopoietic (LHP) disorder. Results: Leukemia (n = 14) and breast cancer (n = 10) were the most common complaints, followed by brain cancer (n = 6), aplastic anemia (n = 6), and non-Hodgkin lymphoma (n = 4). LHP disorders (n = 24) accounted for 43%. Sixty percent (n = 33) of registered workers (n = 55) were found to have been employed before 2000. Seventy-six percent (n = 42) of registered workers and 79% (n = 19) among the registered workers with LHP (n = 24) were found to be diagnosed at a relatively young age, ${\leq}40years$. A total of 18 workers among the registered semiconductor workers were finally determined to deserve compensation for occupational disease by either the KWCWS (n = 10) or the administrative court (n = 8). Eleven fabrication workers who were compensated responded as having handled wafers smaller than eight inches in size. Eight among the 18 workers compensated (44 %) were found to have ever worked at etching operations. Conclusion: The distribution of cancer and rare diseases among registered semiconductor workers was closely related to the manufacturing era before 2005, ${\leq}8$ inches of wafer size handled, exposure to clean rooms of fabrication and chip assembly operations, and etching operations.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.94-94
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• 2008

We have performed simulation for Junction Field Effect Transistor(JFET) using Silvco to improve its electrical properties. The device structure and process conditions of Si-control JFET(Si-JFET) were determined to set its cut off voltage and drain current(at Vg=0V) to -0.5V and $300{\mu}A$, respectively. From electrical property obtained at various implantation energy, dose, and drive-in conditions of p-gate doping, we found that the drive in time of p-type gate was the most determinant factor due to severe diffusion. Therefore we newly designed SiGe-JFET, in which SiGe layer is to epitaxial layers placed above and underneath of the Si-channel. The presence of SiGe layer lessen the p-type dopants (Boron) into the n-type Si channel the phenomenon would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer will be discussed in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.