• 대한전자공학회논문지
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• 제27권12호
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• pp.1865-1869
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• 1990

N-Channel polysilicon MOSFETs (W/L=20/1.5, 3, 5.10\ulcorner) were fabricated using RTP (Rapid Thermal Processor) and hydrogen passivation. The N+ source, drain and gate were annealed and recrystallized using RTP at temperature of 1000\ulcorner-1100\ulcorner. But the active areas were not specially crystallized before growing the gate oxide. Without the hydrogen passivarion, excellent transistor characteristics (ON/OFF=5.10**6, S=85MV/DEC, IL=51pA/\ulcorner) were obtained for 1.5\ulcorner MOSFET. Also the transistor characteristics were improved by hydrogen passivation.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1281-1283
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• 2007

In this paper, the properties of n-channel poly-Si TFTs with different channel widths are reported. Poly-Si fabricated using ELA on glass substrates has high quality as a material for applications such as TFT-LCDs. The fabricated n-channel TFTs have a double stack structure of oxide-nitride which acts as an insulator layer. The results show that the small channel TFTs exhibited a lower $V_{TH}$ and the wide channel TFTs had a higher $I_{DSAT}$. The nchannel poly-Si TFTs with an $I_{ON}/I_{OFF}$ value of more than $10^4$ can be reliable switching devices for AMOLED displays.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.146-146
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• 2010

Electrical properties of Large-grain-size TIT with 7/7 ${\mu}m$ channel width and length which gate insulator is made of 20nm $SiO_2$ and 80nm $SiN_x$. was fabricated and measured with Large-grain-size technic(MICC) and compared to ELA technic's data. The field-effect mobility was decreased from 106.78 to $88.74\;cm^2$/Vs and threshold voltage also decreased from -1.8382 to -0.9529 V, when TFT process is changed from ELA technic to MICC technic. Subthreshold swing, also, increased from 0.22 to 0.32 V/dec and $I_{on/off}$ ratio decreased from $1.12{\times}10^8$ to $5.75{\times}10^7$.

• Bulletin of the Korean Chemical Society
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• 제35권11호
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• pp.3299-3302
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• 2014

The In2S3 thin films of tetragonal structure and In2O3 films of cubic structure were synthesized by a spin coating method from the organometallic compound precursor triethylammonium indium thioacetate ($[(Et)_3NH]^+[In(SCOCH_3)_4]^-$; TEA-InTAA). In order to determine the electron mobility of the spin-coated TEA-InTAA films, thin film transistors (TFTs) with an inverted structure using a gate dielectric of thermal oxide ($SiO_2$) was fabricated. These devices exhibited n-channel TFT characteristics with a field-effect electron mobility of $10.1cm^2V^{-1}s^{-1}$ at a curing temperature of $500^{\circ}C$, indicating that the semiconducting thin film material is applicable for use in low-cost, solution-processed printable electronics.

• 한국전기전자재료학회논문지
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• 제34권2호
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• pp.99-104
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• 2021

Ion-beam sputtering (IBS) was used to deposit semiconducting IZTO (indium zinc tin oxide) thin films onto heavily-doped Si substrates using a sintered ceramic target with the nominal composition In0.4Zn0.5Sn0.1O1.5, which could work as a channel layer for oxide TFT (oxide thin film transistor) devices. The crystallization behavior and electrical properties were examined for the films in terms of deposition parameters, i.e. target tilt angle and substrate temperature during deposition. The thickness uniformity of the films were examined using a stylus profilometer. The observed difference in electrical properties was not related to the degree of crystallization but to the deposition temperature which affected charge carrier concentration (n), electrical resistivity (ρ), sheet resistance (Rs), and Hall mobility (μH) values of the films.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1044-1046
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• 2009

Here we report the architecture for a non-volatile n-type memory paper field-effect transistor. The device is built using the hybrid integration of natural cellulose fibers (pine and eucalyptus fibers embedded in an ionic resin), which act simultaneously as substrate and gate dielectric, with amorphous GIZO and IZO oxides as gate and channel layers, respectively. This is complemented by the use of continuous patterned metal layers as source/drain electrodes.

• 전자공학회논문지A
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• 제30A권10호
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• pp.51-58
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• 1993

N-channel TFTs fabricated on the pre-amorphized (by Si ion implantation) and recrystallized Si film having 10.1V threshold voltage, 20.7cm$^{2}$/V$\cdot$s field effect mobility and ~10$^{5}$/ ON/OFF ratio, whowed improved characteristics comparing to those obtained from the as-deposited (by LPCVD) poly Si film which had 11.2V, 9cm$^{2}$/V$\cdot$s and ~10$^{4}$ respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.396-399
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• 2009

Thin-film transistors (TFTs) with an aluminum indium oxide (AIO) channel layer were fabricated via a simple and low-cost sol-gel process. Effects of annealing temperature and time were investigated for better TFT performance. The sol-gel AIO TFTs were annealed as low as $350^{\circ}C$. They exhibit n-type semiconductor behavior, a mobility higher than 19 $cm^2/V{\cdot}s$ and an onto-off current ratio greater than $10^8$.

• 대한전기학회논문지
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• 제41권7호
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• pp.760-765
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• 1992

The material properties and the TFT characteristics fabricated on SiOS12T substrate by LPCVD using SiHS14T gas were investigated. The deposition rate showed Arrhenius behavior with an activation energy of 31Kcal/mol. And the transition temperature form amorphous to crystalline deposition was observed at 570$^{\circ}C$-580$^{\circ}C$. The strong(220) texture was observed as the deposition temperature increases. XRD analysis showed that the film texture of the as-deposited polycrystalline silicon does not change after annealing at 850$^{\circ}C$. The fabricated TFT's based on the as-deposited amorphous film showed superior electrical characteristics to those of the as-deposited polycrystalline films. It is considered that the different electrical characteristics result from the difference of flat band voltage(VS1FBT) due to the interface trap density between the gate oxide and the active channel.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.80-81
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• 2008

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.