• Title/Summary/Keyword: n-bit words

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ON SECURE BINARY SEQUENCES GENERATED BY A FUNCTION f(x) = x + (g(x)2 ∨ C) mod 2n

  • Rhee, Min Surp
    • Journal of the Chungcheong Mathematical Society
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    • v.22 no.4
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    • pp.789-797
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    • 2009
  • Invertible transformations over n-bit words are essential ingredients in many cryptographic constructions. When n is large (e.g., n = 64) such invertible transformations are usually represented as a composition of simpler operations such as linear functions, S-P networks, Feistel structures and T-functions. Among them we will study T-functions which are probably invertible transformation and are very useful in stream ciphers. In this paper we will show that $f(x)=x+(g(x)^2{\vee}C)$ mod $2^n$ is a permutation with a single cycle of length $2^n$ if both the least significant bit and the third significant bit in the constant C are 1, where g(x) is a T-function.

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ON A CHARACTERIZATION OF SECURE TRINOMIALS ON ℤ2n

  • Rhee, Min Surp
    • Journal of the Chungcheong Mathematical Society
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    • v.29 no.4
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    • pp.573-584
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    • 2016
  • Invertible transformations over n-bit words are essential ingredients in many cryptographic constructions. Such invertible transformations are usually represented as a composition of simpler operations such as linear functions, S-P networks, Feistel structures and T-functions. Among them T-functions are probably invertible transformations and are very useful in stream ciphers. In this paper we will characterize a secure trinomial on ${\mathbb{Z}}_{2^n}$ which generates an n-bit word sequence without consecutive elements of period $2^n$.

ON A CHARACTERIZATION OF T-FUNCTIONS WITH ONE CYCLE PROPERTY

  • Rhee, Min Surp
    • Journal of the Chungcheong Mathematical Society
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    • v.21 no.2
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    • pp.259-268
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    • 2008
  • To the design of secret key, there are two types of basic approaches called the tame approach and the wild approach. In the tame approach we try to use only simple primitives such as linear feedback shift registers and to prove mathematical theorems about their cryptographic properties. In the wild approach we try to use crazy compositions of operations which mix a variety of domains in a nonlinear and nonalgebraic way. There are several papers which try to bridge this gap by considering semi-wild constructions. A T-function on n-bit words plays an important role in semi-wild constructions. In this paper we study the invertibility and the period of some T-functions. Especially we characterize some polynomials which has a single cycle property.

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ON A T-FUNCTION f(x)=x+h(x) WITH A SINGLE CYCLE ON ℤ2n

  • Rhee, Min Surp
    • Journal of the Chungcheong Mathematical Society
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    • v.24 no.4
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    • pp.927-934
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    • 2011
  • Invertible transformations over n-bit words are essential ingredients in many cryptographic constructions. When n is large (e.g., n = 64) such invertible transformations are usually represented as a composition of simpler operations such as linear functions, S-P networks, Feistel structures and T-functions. Among them we study T-functions which are probably invertible and are very useful in stream ciphers. In this paper we study some conditions on a T-function h(x) such that f(x) = x + h(x) has a single cycle on ${\mathbb{Z}}_{2^n}$.

ON SINGLE CYCLE T-FUNCTIONS GENERATED BY SOME ELEMENTS

  • Rhee, Min Surp
    • Journal of the Chungcheong Mathematical Society
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    • v.28 no.2
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    • pp.331-343
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    • 2015
  • Invertible transformations over n-bit words are essential ingredients in many cryptographic constructions. When n is large such invertible transformations are usually represented as a composition of simpler operations such as linear functions, S-P networks, Feistel structures and T-functions. Among them we study T-functions which are probably invertible transformations and are very useful in stream ciphers. In this paper we study the number of single cycle T-functions satisfying some conditions and characterize single cycle T-functions on $(\mathbb{Z}_2)^n$ generated by some elements in $(\mathbb{Z}_2)^{n-1}$.

Dynamic Testing for Word - Oriented Memories (워드지향 메모리에 대한 동적 테스팅)

  • Young Sung H.
    • Journal of the Korea Computer Industry Society
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    • v.6 no.2
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    • pp.295-304
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    • 2005
  • This paper presents the problem of exhaustive test generation for detection of coupling faults between cells in word-oriented memories. According to this fault model, contents of any w-bit memory word in a memory with n words, or ability tochange this contents, is influenced by the contents of any other s-1 words in the memory. A near optimal iterative method for construction of test patterns is proposed The systematic structure of the proposed test results in simple BIST implementations.

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ON SOME PROPERTIES OF A SINGLE CYCLE T-FUNCTION AND EXAMPLES

  • Rhee, Min Surp
    • Journal of the Chungcheong Mathematical Society
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    • v.23 no.4
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    • pp.885-892
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    • 2010
  • In this paper we study the structures and properties of a single cycle T-finction, whose theory has been lately proposed by Klimov and Shamir. Any cryptographic system based on T-functions may be insecure. Some of the TSC-series stream ciphers have been successfully attacked by some attacks. So it is important to analyze every aspect of a single cycle T-function. We study some properties on a single cycle T-function and we show some examples are single cycle T-functions by these properties, whose proof is easier than existing methods.

A Scalable ECC Processor for Elliptic Curve based Public-Key Cryptosystem (타원곡선 기반 공개키 암호 시스템 구현을 위한 Scalable ECC 프로세서)

  • Choi, Jun-Baek;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.8
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    • pp.1095-1102
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    • 2021
  • A scalable ECC architecture with high scalability and flexibility between performance and hardware complexity is proposed. For architectural scalability, a modular arithmetic unit based on a one-dimensional array of processing element (PE) that performs finite field operations on 32-bit words in parallel was implemented, and the number of PEs used can be determined in the range of 1 to 8 for circuit synthesis. A scalable algorithms for word-based Montgomery multiplication and Montgomery inversion were adopted. As a result of implementing scalable ECC processor (sECCP) using 180-nm CMOS technology, it was implemented with 100 kGEs and 8.8 kbits of RAM when NPE=1, and with 203 kGEs and 12.8 kbits of RAM when NPE=8. The performance of sECCP with NPE=1 and NPE=8 was analyzed to be 110 PSMs/sec and 610 PSMs/sec, respectively, on P256R elliptic curve when operating at 100 MHz clock.

A DCF Throughput Analysis of the Ideal and Fading Channel in the Wireless LAN (무선 LAN에서 이상 및 페이딩 채널 환경의 DCF 처리율 비교 분석)

  • Lee, Yong-Sik;Lee, Ha-Cheol;Lee, Byung-Ho
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.7
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    • pp.741-753
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    • 2008
  • This paper explores the throughput performance of CSMA/CA-based DCF protocol over both ideal channels and fading channels with payload size at the MAC layer in the 802.11a wireless LAN. In the ideal channel, there are no errors and at the transmission cycle there is one and only one active station which always has a packet to send and other stations can only accept packets and provide acknowledgements. In the fading channel, bit errors appear in the channel randomly and the number of stations is assumed to be fixed. And each station always has packets for transmission. In other words, we operate in saturation conditions. Up to now conventional research work about DCF throughput analysis of IEEE 802.11 a wireless LAN has been done over the ideal channel, but this paper is done over the Rayleigh/Ricean fading channel. So, the ratio of received average energy per bit-to-noise power spectral density $E_b/N_o$ is set to 25 dB and the ratio of direct-to-diffuse signal power in each sub-channel $\xi$ is set to 6 for combined Rayleigh/Ricean fading channel. In conclusion, it is shown that the saturation throughput is always less than the maximum throughput at all the payload size and the higher the transmission rate be, the higher the decreasing rate of saturation throughput compared to the maximum throughput be.

A Study on the Test Circuit Design and Development of Algorithm for Parallel RAM Testing (RAM의 병렬 테스팅을 위한 알고리듬개발 및 테스트회로 설계에 관한 연구)

  • 조현묵;백경갑;백인천;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.7
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    • pp.666-676
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    • 1992
  • In this paper, algorithm and testable circuit to find all PSF(Pattern Sensitive Fault ) occured in RAM were proposed. Conventional test circuit and algorithm took much time in testing because consecutive test for RAM cells or f-dimensional memory struciure was not employed. In this paper, methodology for parallel RAM-testing was proposed by compensating additional circuit for test to conventional RAM circuit. Additional circuits are parallel comparator, error detector, group selector circuit and a modified decoder used for parallel testing. And also, the constructive method of Eulerian path to obtain efficient test pattern was performed. Consequently, If algorithm proposed in this paper Is used, the same operations as 32sxwor4 lines will be needed to test b x w=n matrix RAM. Circuit simulation was performerd, and 10 bits x :If words testable RAM was designed.

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