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A Scalable ECC Processor for Elliptic Curve based Public-Key Cryptosystem

타원곡선 기반 공개키 암호 시스템 구현을 위한 Scalable ECC 프로세서

  • Choi, Jun-Baek (Core Technology R&D Center, Ranix Inc.) ;
  • Shin, Kyung-Wook (School of Electronic Engineering, Kumoh National Institute of Technology)
  • Received : 2021.07.19
  • Accepted : 2021.07.29
  • Published : 2021.08.31

Abstract

A scalable ECC architecture with high scalability and flexibility between performance and hardware complexity is proposed. For architectural scalability, a modular arithmetic unit based on a one-dimensional array of processing element (PE) that performs finite field operations on 32-bit words in parallel was implemented, and the number of PEs used can be determined in the range of 1 to 8 for circuit synthesis. A scalable algorithms for word-based Montgomery multiplication and Montgomery inversion were adopted. As a result of implementing scalable ECC processor (sECCP) using 180-nm CMOS technology, it was implemented with 100 kGEs and 8.8 kbits of RAM when NPE=1, and with 203 kGEs and 12.8 kbits of RAM when NPE=8. The performance of sECCP with NPE=1 and NPE=8 was analyzed to be 110 PSMs/sec and 610 PSMs/sec, respectively, on P256R elliptic curve when operating at 100 MHz clock.

성능과 하드웨어 복잡도 사이에 높은 확장성과 유연성을 갖는 확장 가능형 ECC 구조를 제안한다. 구조적 확장성을 위해 유한체 연산을 32 비트 워드 단위로 병렬 처리하는 처리요소의 1차원 배열을 기반으로 모듈러 연산회로를 구현하였으며, 사용되는 처리요소의 개수를 1~8개 범위에서 결정하여 회로를 합성할 수 있도록 설계되었다. 이를 위해 워드 기반 몽고메리 곱셈과 몽고메리 역원 연산의 확장 가능형 알고리듬을 적용하였다. 180-nm CMOS 공정으로 확장 가능형 ECC 프로세서 (sECCP)를 구현한 결과, NPE=1인 경우에 100 kGE와 8.8 kbit의 RAM으로 구현되었고, NPE=8인 경우에는 203 kGE와 12.8 kbit의 RAM으로 구현되었다. sECCP가 100 MHz 클록으로 동작하는 경우, NPE=1인 경우와 NPE=8인 경우의 P256R 타원곡선 상의 점 스칼라 곱셈을 각각 초당 110회, 610회 연산할 수 있는 것으로 분석되었다.

Keywords

Acknowledgement

· This work was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (No. 2020R1I1A3A04038083) · Authors are thankful to IDEC for EDA tool support

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