• 제목/요약/키워드: multilevel inverter topologies

검색결과 30건 처리시간 0.026초

Soft-Switching T-Type Multilevel Inverter

  • Chen, Tianyu;Narimani, Mehdi
    • Journal of Power Electronics
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    • 제19권5호
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    • pp.1182-1192
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    • 2019
  • In order to improve the conversion efficiency and mitigate the EMI problem of conventional hard-switching inverters, a new soft-switching DC-AC inverter with a compact structure and a low modulation complexity is proposed in this paper. In the proposed structure, resonant inductors are connected in series for the arm branches, and resonant capacitors are connected in parallel for the neutral point branches. With the help of resonant components, the proposed structure achieves zero-current switching on the arm branches and zero-voltage switching on the neutral point branches. When compared with state-of-art soft-switching topologies, the proposed topology does not need auxiliary switches. Moreover, the commutation algorithm to realize soft-switching can be easily implemented. In this paper, the principle of the resonant operation of the proposed soft-switching converter is presented and its performance is verified through simulation studies. The feasibility of the proposed inverter is evaluated experimentally with a 2.4-kW prototype.

3300V 1MVA H-브릿지 멀티레벨 인버터 개발 (Development of 3300V 1MVA Multilevel Inverter using Cascaded H-Bridge Cell)

  • 박영민;김연달;이현원;이세현;서광덕
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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    • pp.593-597
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    • 2003
  • Multilevel power conversion technology has received increasing attention recently for high power applications. The converters with the technology are suitable for high voltage and high power applications due to their ability to synthesize waveforms with better harmonic spectrum and apply for the high voltage equipment with a limited voltage rating of device. In the family of multilevel inverters, the topologies based on cascaded H-bridges are particularly attractive because of their modularity and simplicity of control. This paper presents multilevel inverter with cascaded H-bridge for large-power motor drives. The main features of this drive 1) reduce harmonic injection 2) can generate near-sinusoidal voltages, 3) have almost no common-mode voltage; 4) are low dv/dt at output voltage; 5)do not generate significant over-voltage on motor terminal; The topology of the developed product is presented and the feasibility study of the inverter on 3300v 1MVA 7-level H-bridge type was tarried out with experiments.

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A Cascaded Modular Multilevel Inverter Topology Using Novel Series Basic Units with a Reduced Number of Power Electronic Elements

  • Barzegarkhoo, Reza;Vosoughi, Naser;Zamiri, Elyas;Kojabadi, Hossein Madadi;Chang, Liuchen
    • Journal of Power Electronics
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    • 제16권6호
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    • pp.2139-2149
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    • 2016
  • In this study, a new type of cascaded modular multilevel inverters (CMMLIs) is presented which is able to produce a considerable number of output voltage levels with a reasonable number of components. Accordingly, each series stage of the proposed CMMLI is comprised of two same basic units that are connected with each other through two unidirectional power switches without aiming any of the full H-bridge cells. In addition, since the potentiality for generating a higher number of output voltage levels in CMMLIs hinges on the magnitude of the dc voltage sources used in each series unit, in the rest of this paper, four different algorithms for determining an appropriate value for the dc sources' magnitude are also presented. In the following, a comprehensive topological analysis between some CMMLI structures reported in the literature and proposed structure along with several simulation and experimental results will be also given to validate the lucrative benefits and viability of the proposed topology.

Switching Voltage Modeling and PWM Control in Multilevel Neutral-Point-Clamped Inverter under DC Voltage Imbalance

  • Nguyen, Nho-Van;Nguyen, Tam-Khanh Tu;Lee, Hong-Hee
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.504-517
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    • 2015
  • This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

Verification of New Family for Cascade Multilevel Inverters with Reduction of Components

  • Banaei, M.R.;Salary, E.
    • Journal of Electrical Engineering and Technology
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    • 제6권2호
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    • pp.245-254
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    • 2011
  • This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.

A Modified Switched-Diode Topology for Cascaded Multilevel Inverters

  • Karasani, Raghavendra Reddy;Borghate, Vijay B.;Meshram, Prafullachandra M.;Suryawanshi, H.M.
    • Journal of Power Electronics
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    • 제16권5호
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    • pp.1706-1715
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    • 2016
  • In this paper, a single phase modified switched-diode topology for both symmetrical and asymmetrical cascaded multilevel inverters is presented. It consists of a Modified Switched-Diode Unit (MSDU) and a Twin Source Two Switch Unit (TSTSU) to produce distinct positive voltage levels according to the operating modes. An additional H-bridge synthesizes a voltage waveform, where the voltage levels of either polarity have less Total Harmonic Distortion (THD). Higher-level inverters can be built by cascading MSDUs. A comparative analysis is done with other topologies. The proposed topology results in reductions in the number of power switches, losses, installation area, voltage stress and converter cost. The Nearest Level Control (NLC) technique is employed to generate the gating signals for the power switches. To verify the performance of the proposed structure, simulation results are carried out by a PSIM under both steady state and dynamic conditions. Experimental results are presented to validate the simulation results.

Single-Phase Step-Up Five-Level Inverter with Phase-Shifted Pulse Width Modulation

  • Chen, Jianfei;Wang, Caisheng;Li, Jian
    • Journal of Power Electronics
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    • 제19권1호
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    • pp.134-145
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    • 2019
  • A single-phase step-up five-level inverter topology with a new phase-shifted pulse width modulation (PS-PWM) strategy is proposed in this paper. When compared with conventional single-phase five-level inverter topologies, the proposed topology can realize multilevel inversion with a double step-up ratio, a reduced number of switching devices and self-balanced capacitor voltages. When compared with the conventional PS-PWM strategy, the new PS-PWM strategy can be implemented with one carrier reduced, which makes it much easier to implement in a digital signal processor (DSP) system. Experimental results have been presented to verify the effectiveness of the proposed inverter and the PS-PWM strategy.

Low Cost FPGA-based Control Strategy for a Single Phase Stacked Multicell Converter

  • Aguillon-Gracia, Jacobo;Moon, Gun-Woo
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.408-410
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    • 2005
  • Multilevel converters have emerged like a new strategy for energy conversion from medium power to high power. The main characteristic of the topologies classified as multilevel, is the use of commutation devices connected in series, allowing the distribution of the voltage and reducing stress in the commutation switches. Stacked Multicell Converter (SMC), is classified as single-phase voltage source inverter(VSI). Due to the fact, the SMC generates a signal of alternating current of several levels of voltage of direct current. The following work will demonstrate the flexibility of the above mentioned topology using a low cost control circuit architecture.

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A Stipulation Based Sources Insertion Multilevel Inverter (SBSIMLI) for Waning the Component Count and Separate DC Sources

  • Edwin, Jose S;Titus, S
    • Journal of Electrical Engineering and Technology
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    • 제12권4호
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    • pp.1519-1528
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    • 2017
  • The paper proposes a well structured, component count waned single phase multilevel inverter (MLI) topology, which drives three different modules viz. Stipulation Based Sources Insertion (SBSI) module, Level Count Increasing (LCI) module and Inter-Linking H-Bridge (ILHB) module. The SBSI module confronts the number of basic sources needed in series/parallel to achieve required magnitude for any particular level. The LCI possesses an offsetting dc source and opuses to increase the number of levels and the ILHB module links the SBSI and LCI modules. A developed Hybrid Pulse Width Modulation (HPWM) strategy has PWM pulses for the switches of LCI module while the switches of the remaining two modules function at fundamental switching frequency. A fifteen level version of the proposed stipulation based sources insertion MLI (SBSIMLI) topology is simulated in MATLAB R2010a and a prototype of the similar specifications is constructed to validate the performance by experimental results. The comparison between the developed SBSIMLI topology and the competent topologies shows many interesting facts.

Implementation of a High Efficiency Grid-Tied Multi-Level Photovoltaic Power Conditioning System Using Phase Shifted H-Bridge Modules

  • Lee, Jong-Pil;Min, Byung-Duk;Yoo, Dong-Wook
    • Journal of Power Electronics
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    • 제13권2호
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    • pp.296-303
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    • 2013
  • This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.