• Title/Summary/Keyword: metal-oxide-semiconductor structure

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A study on Improvement of sub 0.1$\mu\textrm{m}$VLSI CMOS device Ultra Thin Gate Oxide Quality Using Novel STI Structure (STI를 이용한 서브 0.1$\mu\textrm{m}$VLSI CMOS 소자에서의 초박막게이트산화막의 박막개선에 관한 연구)

  • 엄금용;오환술
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.9
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    • pp.729-734
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    • 2000
  • Recently, Very Large Scale Integrated (VLSI) circuit & deep-submicron bulk Complementary Metal Oxide Semiconductor(CMOS) devices require gate electrode materials such as metal-silicide, Titanium-silicide for gate oxides. Many previous authors have researched the improvement sub-micron gate oxide quality. However, few have reported on the electrical quality and reliability on the ultra thin gate oxide. In this paper, at first, I recommand a novel shallow trench isolation structure to suppress the corner metal-oxide semiconductor field-effect transistor(MOSFET) inherent to shallow trench isolation for sub 0.1${\mu}{\textrm}{m}$ gate oxide. Different from using normal LOCOS technology deep-submicron CMOS devices using novel Shallow Trench Isolation(STI) technology have a unique"inverse narrow-channel effects"-when the channel width of the devices is scaled down, their threshold voltage is shrunk instead of increased as for the contribution of the channel edge current to the total channel current as the channel width is reduced. Secondly, Titanium silicide process clarified that fluorine contamination caused by the gate sidewall etching inhibits the silicidation reaction and accelerates agglomeration. To overcome these problems, a novel Two-step Deposited silicide(TDS) process has been developed. The key point of this process is the deposition and subsequent removal of titanium before silicidation. Based on the research, It is found that novel STI structure by the SEM, in addition to thermally stable silicide process was achieved. We also obtained the decrease threshold voltage value of the channel edge. resulting in the better improvement of the narrow channel effect. low sheet resistance and stress, and high threshold voltage. Besides, sheet resistance and stress value, rms(root mean square) by AFM were observed. On the electrical characteristics, low leakage current and trap density at the Si/SiO$_2$were confirmed by the high threshold voltage sub 0.1${\mu}{\textrm}{m}$ gate oxide.

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A Study on the TDDB Characteristics of Superthin ONO structure (초박막 GNO 구조의 TDDB 특성에 관한 연구)

  • 국삼경;윤성필;이상은;김선주;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.25-29
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    • 1997
  • Capacitor-type MONOS (metal-oxide-nitride-oxide- semiconductor) NVSMs with 23$\AA$ tunneling oxide and 40$\AA$ blocking oxide were fabricated. The thicknesses of nitride layer were 45$\AA$, 91$\AA$ and 223$\AA$, Breakdown characteristics of MONOS devices were measured to investigate the reliability of superthin ONO structure using ramp voltage and constant voltage method. Reducing the nitride thickness will significantly increase the reliablity of MONOS NVSM.

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Design of a radiation-tolerant I-gate n-MOSFET structure and analysis of its characteristic (I 형 게이트 내방사선 n-MOSFET 구조 설계 및 특성분석)

  • Lee, Min-woong;Cho, Seong-ik;Lee, Nam-ho;Jeong, Sang-hun;Kim, Sung-mi
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.10
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    • pp.1927-1934
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    • 2016
  • In this paper, we proposed a I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistor) structure in order to mitigate a radiation-induced leakage current path in an isolation oxide interface of a silicon-based standard n-MOSFET. The proposed I-gate n-MOSFET structure was designed by using a layout modification technology in the standard 0.18um CMOS (Complementary Metal Oxide Semiconductor) process, this structure supplements the structural drawbacks of conventional radiation-tolerant electronic device using layout modification technology such as an ELT (Enclosed Layout Transistor) and a DGA (Dummy Gate-Assisted) n-MOSFET. Thus, in comparison with the conventional structures, it can ensure expandability of a circuit design in a semiconductor-chip fabrication. Also for verification of a radiation-tolerant characteristic, we carried out M&S (Modeling and Simulation) using TCAD 3D (Technology Computer Aided Design 3-dimension) tool. As a results, we had confirmed the radiation-tolerant characteristic of the I-gate n-MOSFET structure.

Enhanced Electrical Performance of SiZnSnO Thin Film Transistor with Thin Metal Layer

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.3
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    • pp.141-143
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    • 2017
  • Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

Metal-Semiconductor Contact Behavior of Solution-Processed ZnSnO Thin Film Transistors (용액법으로 제작된 ZnSnO 박막트랜지스터의 전극 물질에 따른 계면 접촉특성 연구)

  • Jeong, Young-Min;Song, Keun-Kyu;Woo, Kyoo-Hee;Jun, Tae-Hwan;Jung, Yang-Ho;Moon, Joo-Ho
    • Korean Journal of Materials Research
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    • v.20 no.8
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    • pp.401-407
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    • 2010
  • We studied the influence of different types of metal electrodes on the performance of solution-processed zinc tin oxide (ZTO) thin-film transistors. The ZTO thin-film was obtained by spin-coating the sol-gel solution made from zinc acetate and tin acetate dissolved in 2-methoxyethanol. Various metals, Al, Au, Ag and Cu, were used to make contacts with the solution-deposited ZTO layers by selective deposition through a metal shadow mask. Contact resistance between the metal electrode and the semiconductor was obtained by a transmission line method (TLM). The device based on an Al electrode exhibited superior performance as compared to those based on other metals. Kelvin probe force microscopy (KPFM) allowed us to measure the work function of the oxide semiconductor to understand the variation of the device performance as a function of the types metal electrode. The solution-processed ZTO contained nanopores that resulted from the burnout of the organic species during the annealing. This different surface structure associated with the solution-processed ZTO gave a rise to a different work function value as compared to the vacuum-deposited counterpart. More oxygen could be adsorbed on the nanoporous solution-processed ZTO with large accessible surface areas, which increased its work function. This observation explained why the solution-processed ZTO makes an ohmic contact with the Al electrode.

Change in the Energy Band Gap and Transmittance IGZO, ZnO, AZO OMO Structure According to Ag Thickness (IGZO, ZnO, AZO OMO 구조의 Ag두께 변화에 따른 투과율과 에너지 밴드 갭의 변화)

  • Lee, Seung-Min;Kim, Hong-Bae;Lee, Sang-Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.3
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    • pp.185-190
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    • 2015
  • In this study, we fabricated the indium gallium zinc oxide (IGZO), zinc oxide (ZnO), aluminum zinc oxide (AZO). oxide and silver are deposited by magnetron sputtering and thermal evaporator, respectively transparency and energy bandgap were changed by the thickness of silver layer. To fabricate metal oxide metal (OMO) structure, IGZO sputtered on a corning 1,737 glass substrate was used as bottom oxide material and then silver was evaporated on the IGZO layer, finally IGZO was sputtered on the silver layer we get the final OMO structure. The radio-frequency power of the target was fixed at 30 W. The chamber pressure was set to $6.0{\times}10^{-3}$ Torr, and the gas ratio of Ar was fixed at 25 sccm. The silver thickness are varied from 3 to 15 nm. The OMO thin films was analyzed using XRD. XRD shows broad peak which clearly indicates amorphous phase. ZnO, AZO, OMO show the peak [002] direction at $34^{\circ}$. This indicate that ZnO, AZO OMO structure show the crystalline peak. Average transmittance of visible region was over 75%, while that of infrared region was under 20%. Energy band gap of OMO layer was increased with increasing thickness of Ag layer. As a result total transmittance was decreased.

Thermal Treated Al-doped Zinc Oxide (AZO) Film-embedding UV Sensors

  • Kim, Jun-Dong;Yun, Ju-Hyeong;Ji, Sang-Won;Park, Yun-Chang;Anderson, Wayne A.;Han, Seok-Gyu;Kim, Yeong-Guk;Kim, Jae-Hyeon;Anderson, Wayne A.;Lee, Jeong-Ho;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.90-90
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    • 2011
  • Transparent conducting oxide (TCO) films have been intensively utilized in the electric applications, such as, displays, lightings and solar cells due to the good electric conductivity with an excellent transmittance of the visible light. We, herein present an excellent Al-doped ZnO film (AZO), which has been fabricated by co-sputtering method. An as-deposited AZO film had an optical transmittance of 84.78% at 550 nm and a resistivity of $7.8{\times}10^{-3}{\Omega}cm$. A rapid annealing process significantly improved the optical transmittance and electrical resistivity of the AZO film to 99.67% and $1{\times}10^{-3}{\Omega}cm$, respectively. The fabricated AZO film was fabricated for a metal-semiconductor-metal (MSM) structure. The AZO film-embedding MSM device was highly responsive to a UV light.

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A New Structure of SOI MOSFETs Using Trench Mrthod (트랜치 기법을 이용한 SOI MOSFET의 전기적인 특성에 관한 연구)

  • Park, Yun-Sik;Sung, Man-Young;Kang, Ey-Goo
    • 한국컴퓨터산업교육학회:학술대회논문집
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    • 2003.11a
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    • pp.67-70
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    • 2003
  • In this paper, propose a new structure of MOFET(Metal-Oxide-Semiconductor Field Effect Transistor) which is widely application for semiconductor technologies. Eleminate the latch-up effect caused by closed devices when conpose a electronic circuit using proposed devices. In this device have a completely isolation structure, and advantage of leakage current elimination. Each independent devices are isolated by trench-well and oxide layer of SOI substrate. Using trench gate and self aligned techniques reduces parasitic capacitance between gate and source, drain. In this paper, we proposed the new structure of SOI MOSFET which has completely isolation and contains trench gate electrodes and SOI wafers. It is simulated by MEDICI that is device simulator.

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Study of Improvement of Gate Oxide Quality by Using an Advanced, $TiSi_2$ process & STI (새로운 $TiSi_2$ 형성방법과 STI를 이용한 초박막 게이트 산화막의 특성 개선 연구)

  • 엄금용;오환술
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.41-44
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    • 2000
  • Ultra large scale integrated circuit(ULSI) & complementary metal oxide semiconductor(CMOS) circuits require gate electrode materials such as meta] silicides, titanium-silicide for gate oxides. Many previous authors have researched the improvements sub-micron gate oxide quality. However, little has been done on the electrical quality and reliability of ultra thin gates. In this research, we recommend novel shallow trench isolation structure and two step TiSi$_{2}$ formation for sub 0.1${\mu}{\textrm}{m}$ gate oxide.

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Deposition Characteristics of $TEOS-O_3$ Oxide Film on Substrate (기판 막질에 따른 $TEOS-O_3$ 산화막의 증착 특성)

  • Ahn, Yong-Cheol;Park, In-Seon;Choi, Ji-Hyeon;Chung, U-In;Lee, Jeong-Gyu;Lee, Jeong-Gyu
    • Korean Journal of Materials Research
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    • v.2 no.1
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    • pp.76-82
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    • 1992
  • Deposition of $TEOS-O_3$ oxide film as inter-metal dielectric layer shows the substrate dependency according to the substrate material and pattern density and pitch size. To minimize substrate and Pattern dependency, TEOS-base and $SiH_4-base$ Plasma oxide were predeposited as underlying material on the substrate. The substrate dependency of $TEOS-O_3$ oxide film was more significant on TEOS-base plasma oxide than on $SiH_4-base$ plasma oxide. The dependency of $TEOS-O_3$ oxide film was remarkably reduced, or nearly eliminated, by $N_2$plasma treatment on TEOS-base plasma oxide, which appears to be caused by the O-Si-N structure, observed on the the surface of TEOS-base plasma oxide.

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