• Title/Summary/Keyword: memory device

Search Result 1,086, Processing Time 0.03 seconds

Development of a Spatio-Temporal Query Processing System for Mobile Devices (모바일 장치용 시공간 질의 처리 시스템의 개발)

  • Shin, In-Su;Yang, Hyeong-Sik;Kim, Joung-Joon;Han, Ki-Joon
    • Journal of Korean Society for Geospatial Information Science
    • /
    • v.20 no.2
    • /
    • pp.81-91
    • /
    • 2012
  • As the recent development of the ubiquitous computing environment, u-GIS is being highlighted as the core technology of the ubiquitous computing environment, and thereby, studies on spatio-temporal data are being actively conducted. In this u-GIS environment, it is still difficult for existing mobile devices to efficiently manage the massive spatio-temporal data of u-GIS that are increasing day by day. Therefore, this paper develops a spatio-temporal query processing system for mobile devices in order to solve the problem. The system provides various spatio-temporal operators to insert/delete/update/search spatio-temporal data and supports a query optimization function that uses a spatio-temporal index for the flash memory and a spatio-temporal histogram for guaranteeing query execution speed. Lastly, by applying the spatio-temporal query processing system developed in this paper to the virtual scenario, this paper has proved that the system can be utilized in various application fields necessary to process spatio-temporal data in the mobile environment.

Thereshold Switching into Conductance Quantized Sttes in V/vamorphous- $V_{2}$ $O_{5}$/V Thin Film Devices (V/비정질- $V_{2}$ $O_{5}$ /lV 박막소자에서의 양자화된 컨덕턴스 상태로의 문턱 스위칭)

  • 윤의중
    • Journal of the Korean Institute of Telematics and Electronics D
    • /
    • v.34D no.12
    • /
    • pp.89-100
    • /
    • 1997
  • This paper investigated a new type of low voltage threshold switch (LVTS). As distinguished from the many other types of electronic threshold switches, the LvTS is ; voltage controlled, occurs at low voltages ($V_{2}$ $O_{5}$lV devices. The average low threshold voltage < $V_{LVT}$>=218 mV (standard deviation =24mV~kT/q, where T=300K), and was independent of the device area (x100) and amorphous oxide occurred in an ~22.angs. thick interphase of the V/amorphous- $V_{2}$ $O_{5}$ contacts. At $V_{LVT}$ there was a transition from an initially low conductance (OFF) state into a succession of quantized states of higher conductance (ON). The OFF state was spatically homogeneous and dominated by tunneling into the interphase. The ON state conductances were consistent with the quantized conductances of ballistic transport through a one dimensional, quantum point contact. The temeprature dependence of $V_{LVT}$, and fit of the material parameters (dielectric function, barrier energy, conductivity) to the data, showed that transport in the OFF and ON states occurred in an interphase with the characteristics of, respectively, semiconducting and metallic V $O_{2}$. The experimental results suggest that the LVTS is likely to be observed in interphases produced by a critical event associated with an inelastic transfer of energy.rgy.y.rgy.

  • PDF

I/O Scheme of Hybrid Hard Disk Drive for Low Power Consumption and Effective Response Time (저전력과 응답시간 향상을 위한 하이브리드 하드디스크의 입출력 기법)

  • Kim, Jeong-Won
    • Journal of the Korea Society of Computer and Information
    • /
    • v.16 no.10
    • /
    • pp.23-31
    • /
    • 2011
  • Recently, Solid state disk is mainly used because this device has lower power consumption as well as higher response time. But it features higher price and lower performance at delete and write operations compared with HDD. To compensate this defect, Hybrid hard disk with internal non-volatile flash memory was issued. This NVCache is used as a kind of cache for disk blocks. In this paper, an I/O scheme for H-HDD is proposed for improving low power consumption as well as response time. Our method is to use this NVCache as read cache mainly and write cache when write requests are concentrated. In read cache operation, disk blocks with higher priority determined on basis of time as well as spatial localities are prefetched, which can improve response time. The write operation is conducted only at write peak time as disk spindle up costs higher battery power as well as response time. Experiments results show that the suggested method can improve response time of H-HDD and lower the power consumption.

Single-Electron Logic Cells and SET/FET Hybrid Integrated Circuits

  • Kim, S.J.;Lee, C.K.;Lee, J.U.;Choi, S.J.;Hwang, J.H.;Lee, S.E.;Choi, J.B.;Park, K.S.;Lee, W.H.;Paik, I.B.;Kang, J.S.
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.6 no.1
    • /
    • pp.52-58
    • /
    • 2006
  • Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

A Study of the Electrical Characteristics of WOx Material for Non-Volatile Resistive Random Access Memory (비-휘발성 저항 변화 메모리 응용을 위한 WOx 물질의 전기적 특성 연구)

  • Jung, Kyun Ho;Kim, Kyong Min;Song, Seung Gon;Park, Yun Sun;Park, Kyoung Wan;Sok, Jung Hyun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.29 no.5
    • /
    • pp.268-273
    • /
    • 2016
  • In this study, we observed current-voltage characteristics of the MIM (metal-insulator-metal) structure. The $WO_x$ material was used between metal electrodes as the oxide insulator. The structure of the $Al/WO_x/TiN$ shows bipolar resistive switching and the operating direction of the resistive switching is clockwise, which means set at negative voltage and reset at positive voltage. The set process from HRS (high resistance state) to LRS (low resistance state) occurred at -2.6V. The reset process from LRS to HRS occurred at 2.78V. The on/off current ratio was about 10 and resistive switching was performed for 5 cycles in the endurance characteristics. With consecutive switching cycles, the stable $V_{set}$ and $V_{reset}$ were observed. The electrical transport mechanism of the device was based on the migration of oxygen ions and the current-voltage curve is following (Ohm's Law ${\rightarrow}$ Trap-Controlled Space Charge Limited Current ${\rightarrow}$ Ohm's Law) process in the positive voltage region.

Costume Analysis through the Text and Characters of 'Nezimaki Tori Chronicle' ([태엽 감는 새 연대기]를 텍스트로한 캐릭터와 의상 관계 분석)

  • Lim, Chan;Yu, Dahye;Peak, Lora
    • The Journal of the Korea Contents Association
    • /
    • v.13 no.11
    • /
    • pp.617-625
    • /
    • 2013
  • Along with and <1Q84> Murakami Haruki sees through human nature that fades away with time in his latest work with 'color and memory'. This is the type of character or story to read with the deployment of instrument. Costume of characters conceived in the expansion of the body, the inner expression of personal notes. To others what you want to look, how they formed on the body, with a range of social, if you are claiming a statement. To form the body by forming self-practice is that there becomes. This paper the inside of the characters and the apparent strong interest in the set, costume characters, especially characters were recognized as representing the device of novel. Work directly in the results, or is described as a symbolic system of the body and clothing that embodies the meaning of the symbol you want to the structure of the exchange.

Trend and Prospect for 3Dimensional Integrated-Circuit Semiconductor Chip (3차원 집적회로 반도체 칩 기술에 대한 경향과 전망)

  • Kwon, Yongchai
    • Korean Chemical Engineering Research
    • /
    • v.47 no.1
    • /
    • pp.1-10
    • /
    • 2009
  • As a demand for the portable device requiring smaller size and better performance is in hike, reducing the size of conventionally used planar 2 dimensional chip cannot be a solution for the enhancement of the semiconductor chip technology due to an increase in RC delay among interconnects. To address this problem, a new technology - "3 dimensional (3D) IC chip stack" - has been emerging. For the integration of the technology, several new key unit processes (e.g., silicon through via, wafer thinning and wafer alignment and bonding) should be developed and much effort is being made to achieve the goal. As a result of such efforts, 4 and 8 chip-stacked DRAM and NAND structures and a system stacking CPU and memory chips vertically were successfully developed. In this article, basic theory, configurations and key unit processes for the 3D IC chip integration, and a current tendency of the technology are explained. Future opportunities and directions are also discussed.

A Study On The Wearable Embedded System Platform (입을 수 있는 내장형 시스템 플랫품에 관한 연구)

  • Yoo, Jin-Ho;Jeong, Hyun-Tae;Cho, Il-Yeon;Lee, Sang-Ho;Han, Dong-Won
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.12B
    • /
    • pp.831-837
    • /
    • 2005
  • Personal general purpose computer(PC) has been evolved from desktop to portable mobile device such as tablet PC and PDA. Technology innovation on semiconductor have made it possible to package a reasonably Powerful Processor and memory subsystem with advanced input/output devices. At last these subsystems are miniaturized into wearable system. Wearable computer has recently gained attention as the post PC in the ubiquitous environment. Wearable computing becomes more and more feasible and receives growing attention throughout industry and the consumer marketplaces. This paper proposed and developed WPS that has multimedia features and network features as a wearable embedded platform. We explain the form, overall architecture, functions and user applications of this WPS. This paper also discusses the form of next generation computer platform with intuitive user interfaces and well designed applications in the future.

A Bayesian Inference Model for Landmarks Detection on Mobile Devices (모바일 디바이스 상에서의 특이성 탐지를 위한 베이지안 추론 모델)

  • Hwang, Keum-Sung;Cho, Sung-Bae;Lea, Jong-Ho
    • Journal of KIISE:Computing Practices and Letters
    • /
    • v.13 no.1
    • /
    • pp.35-45
    • /
    • 2007
  • The log data collected from mobile devices contains diverse meaningful and practical personal information. However, this information is usually ignored because of its limitation of memory capacity, computation power and analysis. We propose a novel method that detects landmarks of meaningful information for users by analyzing the log data in distributed modules to overcome the problems of mobile environment. The proposed method adopts Bayesian probabilistic approach to enhance the inference accuracy under the uncertain environments. The new cooperative modularization technique divides Bayesian network into modules to compute efficiently with limited resources. Experiments with artificial data and real data indicate that the result with artificial data is amount to about 84% precision rate and about 76% recall rate, and that including partial matching with real data is about 89% hitting rate.

An Efficient Adaptive Bitmap-based Selective Tuning Scheme for Spatial Queries in Broadcast Environments

  • Song, Doo-Hee;Park, Kwang-Jin
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.5 no.10
    • /
    • pp.1862-1878
    • /
    • 2011
  • With the advances in wireless communication technology and the advent of smartphones, research on location-based services (LBSs) is being actively carried out. In particular, several spatial index methods have been proposed to provide efficient LBSs. However, finding an optimal indexing method that balances query performance and index size remains a challenge in the case of wireless environments that have limited channel bandwidths and device resources (computational power, memory, and battery power). Thus, mechanisms that make existing spatial indexing techniques more efficient and highly applicable in resource-limited environments should be studied. Bitmap-based Spatial Indexing (BSI) has been designed to support LBSs, especially in wireless broadcast environments. However, the access latency in BSI is extremely large because of the large size of the bitmap, and this may lead to increases in the search time. In this paper, we introduce a Selective Bitmap-based Spatial Indexing (SBSI) technique. Then, we propose an Adaptive Bitmap-based Spatial Indexing (ABSI) to improve the tuning time in the proposed SBSI scheme. The ABSI is applied to the distribution of geographical objects in a grid by using the Hilbert curve (HC). With the information in the ABSI, grid cells that have no objects placed, (i.e., 0-bit information in the spatial bitmap index) are not tuned during a search. This leads to an improvement in the tuning time on the client side. We have carried out a performance evaluation and demonstrated that our SBSI and ABSI techniques outperform the existing bitmap-based DSI (B DSI) technique.