• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.5
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• pp.41-49
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• 2010

Being popularized the use of portable entertainment/information devices, the demand on flash memory has been also increased radically. In general, flash memory reveals various error patterns by the devices it is mounted, and thus the memory makers are trying to minimize error ratio in the final process through not only the electric test but also the data integrity test under the same condition as real application devices. This process is called an application-level memory test. Though currently various flash memory testing devices have been used in the production lines, most of the works related to memory test depend on the sensual abilities of human testers. In case of testing the flash memory for MP3 devices, the human testers are checking if the memory has some errors by hearing the audio played on the memory testing device. The memory testing process like this has become a bottleneck in the flash memory production line. In this paper, we propose an audio comparison technique to support the efficient flash memory test for MP3 devices. The technique proposed in this paper compares the variance change rate between the source binary file and the decoded analog signal and checks automatically if the memory errors are occurred or not.

• Proceedings of the KSRS Conference
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• 2007.10a
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• pp.69-72
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• 2007

No doubt that more vast data and precise values are required for the detailed and accurate analysis result. People's expectation for the output of space application goes higher, and consequently satellite memory system has to process massive data faster. This paper reviews memory systems of KOMPSAT (Korea Multi-Purpose SATellite) series and try to find a suitable memory system structure to process data more faster not at device level but at system level.

• International Journal of Aeronautical and Space Sciences
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• v.7 no.1
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• pp.91-98
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• 2006

The thermomechanical behaviors of SMA thin film actuator and their application are investigated. The numerical algorithm of the 2-D SMA thermomechanical constitutive equation is developed and implemented into the ABAQUS finite element program by using the user defined material (UMAT) subroutine. To verify the numerical algorithm of SMAs, the results are compared with experimental data. For the application of SMA thin film actuator, the methodology to maintain the precise configuration of inflatable membrane structure is demonstrated.

• Journal of Internet Computing and Services
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• v.17 no.6
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• pp.93-101
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• 2016

As the Android smart phones become more popular, applications that handle users' personal data such as IDs or passwords and those that handle data directly related to companies' income such as in-game items are also increasing. Despite the need for such information to be protected, it can be modified by malicious users or leaked by attackers on the Android. The reason that this happens is because debugging functions of the Linux, base of the Android, are abused. If an application uses debugging functions, it can access the virtual memory of other applications. To prevent such abuse, access controls should be reinforced. However, these functions have been incorporated into Android O.S from its Linux base in unmodified form. In this paper, based on an analysis of both existing memory access functions and the Android environment, we proposes a function that verifies thread group ID and then protects against illegal use to reinforce access control. We conducted experiments to verify that the proposed method effectively reinforces access control. To do that, we made a simple application and modified data of the experimental application by using well-established memory editing applications. Under the existing Android environment, the memory editor applications could modify our application's data, but, after incorporating our changes on the same Android Operating System, it could not.

• Journal of Applied Reliability
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• v.10 no.1
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• pp.65-71
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• 2010

NAND-type SONOS with a separated double-gate FinFET structure (SDF-Fin SONOS) flash memory devices are proposed to reduce the unit cell size of the memory device and increase the memory density in comparison with conventional non volatile memory devices. The proposed memory device consists of a pair of control gates separated along the direction of the Fin width. There are two unique alternative technologies in this study. One is a channel doping method and the other is an oxide thickness variation method, which are used to operate the SDF-Fin SONOS memory device as two-bit. The fabrication processes and the device characteristics are simulated by using technology comuter-adided(TCAD). The simulation results indicate that the charge trap probability depends on the different channel doping concentration and the tunneling oxide thickness. The proposed SDG-Fin SONOS memory devices hold promise for potential application.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.197-204
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• 2002

DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.

• ETRI Journal
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• v.33 no.2
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• pp.230-239
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• 2011

Dynamic memory allocators for real-time embedded systems need to fulfill three fundamental requirements: bounded worst-case execution time, fast average execution time, and minimal fragmentation. Since embedded systems generally run continuously during their whole lifetime, fragmentation is one of the most important factors in designing the memory allocator. This paper focuses on minimizing fragmentation while other requirements are still satisfied. To minimize fragmentation, a part of a memory region is segregated by the proposed budgeting method that exploits the memory profile of the given application. The budgeting method can be applied for any existing memory allocators. Experimental results show that the memory efficiency of allocators can be improved by up to 18.85% by using the budgeting method. Its worst-case execution time is analyzed to be bounded.

• Journal of the Semiconductor & Display Technology
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• v.21 no.1
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• pp.85-90
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• 2022

In this paper, an asynchronous nonvolatile memory module using a self-diagnosis function was designed. For the system to work, a lot of data must be input/output, and memory that can be stored is required. The volatile memory is fast, but data is erased without power, and the nonvolatile memory is slow, but data can be stored semi-permanently without power. The non-volatile static random-access memory is designed to solve these memory problems. However, the non-volatile static random-access memory is weak external noise or electrical shock, data can be some error. To solve these data errors, self-diagnosis algorithms were applied to non-volatile static random-access memory using error correction code, cyclic redundancy check 32 and data check sum to increase the reliability and accuracy of data retention. In addition, the possibility of application to an asynchronous non-volatile storage system requiring reliability was suggested.

• KIISE Transactions on Computing Practices
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• v.20 no.9
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• pp.483-491
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• 2014

Contemporary computer systems exploits DVFS (Dynamic Voltage/Frequency Scaling) technology for balancing performance and power consumption. The efficiency of DVFS depends on how much performance we get for larger power consumption due to elevated CPU frequency. Especially for memory-bounded applications, higher CPU frequency often does not result in higher performance. In this paper, we present an upper bound of CPU frequency scaling based on memory accesses. It is observed that the performance gain due to higher CPU frequency is limited by memory accesses (last level cache misses) per instructions by experiments. Using the results, we present the CPU frequency upper bound with little performance gain. Experimental results show that for a memory-bounded application, applying the frequency upper bound enhances the energy efficiency of the application by above 30%.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.118-118
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• 2011

The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......