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In-Sung Gook, Jae-Min Lee, "A Parallel structure of SRAMs in embedded DRAMs for Testability", Journal of Korea Institute of Information, Electronics, and Communication Technology, Vol.3, No.3, pp.3-7, 2010.
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Tae Hyun Kim, Oh Yang, and Jun Sang Yeon, "Design of Asynchronous Non-Volatile Memory Module using NAND Flash Memory and PSRAM", Journal of Semiconductor & Display Technology Vol.19, No.3, pp.112-117, 2020.
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4 |
Hyunbean Yi, Sungju Park, Pyoungwoo Min, Changwon Park, "A Design of High Performance Parallel CRC Generator", The Journal of Korean Institute of Communications and Information Sciences, Vol.29, No.9, pp.1101-1107, 2004.
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5 |
Seong Ryeol Kim, "The proposed of the Encryption Method and Designed of the Secure Key Using Initial Bad Block Information Physical Address of NAND Flash Memory, "Journal of Korean Institute of Information and Communication Engineering, Vol.20, No.12, pp.2282-2288, 2016.
DOI
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6 |
Jae Hyun Ahn, Oh Yang and Jun Sang Yeon, "Performance Improvement of Asynchronous Mass Memory Module using Error Correction Code", Journal of Semiconductor & Display Technology, Vol.19, No.3, pp.112-117, 2020.
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7 |
Myeong-jin Kang, Daejin Park, "High Speed and Robust Processor based on Parallelized Error Correcting Code Module", Journal of the Korea Institute of Information and Communication Engineering, Vol.24, No,9, pp.1180-1186, 2020.
DOI
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8 |
Jun Sang Yeon, Oh Yang, "Implementation of Communication to Flexibly Configure the Number of Railway Cars", Journal of the Semiconductor & Display Technology, Vol.15, No.4, pp61-66, 2016.
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9 |
Hyunju Kim, Myounggon Kang, "The Verification of Channel Potential using SPICE in 3D NAND Flash Memory", Institute of Korean Electrical and Electronics Engineers, Vol.25, No.4, pp.778-781, 2021.
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10 |
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