• Journal of Power Electronics
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• v.4 no.2
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• pp.96-101
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• 2004

This paper presents an application of SRM drive for LSEV(Low Speed Electric Vehicle). In this paper, a 5〔㎾〕 SRM for a traction of a LSEV is to design and investigate the characteristics of the drive system. The main design parameters and control strategy are given. In the control method, a current control, for the soft-starting technique at a starting operation, is adopted. In the high speed range, an angle control technique is implemented, for a high efficiency drive of SRM. Some experimental tests are executed to find the drive performances.

• The Transactions of the Korean Institute of Power Electronics
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• v.2 no.3
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• pp.37-43
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• 1997

Microstepping control of two phase hybrid step motors provides high step resolution as well as smoothness of operation at low speed, and removes most of the resonance phenomena which is undesirable. This paper focuses on the development of a microstepping driver with enhanced performance. The developed microstepping driver can divide one step(l.8 degree) into 128 microsteps and supports current saving mode to remove the thermal problems which results from long time operation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.1A
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• pp.27-33
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• 2009

This paper proposes transmit power control techniques with fading channel prediction scheme based on recurrent neural network for high-speed mobile communication systems. The operation result of recurrent neural network which is derived interpretively solves complexity problems of neural network circuit, and channel gain of multiple transmit antenna is derived with maximum ratio combining(MRC) by using the operation result, and this channel gain control transmit power of each antenna. simulation results show that proposed method has a outstanding performance compared to method that is not to be controlled power based on channel prediction. Most of legacy studies are for robust receive technique of fading signals or channel prediction of fading signals limited low-speed mobility, but in open loop Power control, proposed channel prediction method decrease system complexity with removal of fading effect in transmitter.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.226-228
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• 2007

SRM drive systems are designed to meet operating standards such as low cost, constant torque independent of rotor position, a desired operating speed range, high efficiency, and high performance. In applications using small motors, low cost and high performance with self-starting capabilities are highly desired. This paper discusses a novel two phase SRM (TPSRM) that has high performance characteristics with self-starting capability, low manufacturing cost with a two phase inverter and simple magnetic structure, and high efficiency. The principle of operation, analysis, and simulation for design are presented. The machine design is verified using finite element analysis (FEA) software. Analysis and simulation results are given to validate the TPSRM design.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.9
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• pp.1597-1604
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• 2016

The speed at which the SRM (Switched Reluctance Motor) makes a transition from chopping control to single pulse operation. (i.e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on energy efficient C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.2
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• pp.72-78
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• 2008

The speed variation of SRM is fulfilled throughout a transition from chopping control to single pulse operation. (i,e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on conventional C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.363-367
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• 1999

In this paper, a novel 108-bit conditional sum adder(CSA) with Energy Economized Pass-transistor Logic(EEPL) is proposed. A new architecture is adopted, in order to obtain a high speed operation, which is composed of seven modularized 16-bit CMS's and two separated carry generation block. Further a design technique based on EEPL is proposed to reduce the power consumption. With 0.65${\mu}{\textrm}{m}$ single poly, triple metal, 3.3V CMOS process, its operating speed is about 4.95㎱ and the power consumption is reduced in comparison with that of the conventional adder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1A
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• pp.1-8
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• 2004

Viterbi decoders are widely used for communication and high-density storage devices. An add-compare-select(ACS) unit has been an active research area for a long time because it is the most critical component in determining the operation speed and power-consumption of the Viterbi decoder. We propose a new comparator which is faster and consumes less power than existing ones. We also used the new comparator for a Viterbi decoder and our simulations results show the Viterbi decoder outperforms existing ones at least $20\%$ in its operating speed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.267-273
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• 2007

A fractional-N frequency synthesizer supports quadruple bands and multiple standards for mobile broadcasting systems. A novel linearized coarse tuned VCO adopting a pseudo-exponential capacitor bank structure is proposed to cover the wide bandwidth of 65%. The proposed technique successfully reduces the variations of KVCO and per-code frequency step by 3.2 and 2.7 times, respectively. For the divider and prescaler circuits, TSPC (true single-phase clock) logic is extensively utilized for high speed operation, low power consumption, and small silicon area. Implemented in $0.18-{\mu}m$ CMOS, the PLL covers $154{\sim}303$ MHz (VHF-III), $462{\sim}911$ MHz (UHF), and $1441{\sim}1887$ MHz (L1, L2) with two VCO's while dissipating 23 mA from 1.8 V supply. The integrated phase noise is 0.598 and 0.812 degree for the integer-N and fractional-N modes, respectively, at 750 MHz output frequency. The in-band noise at 10 kHz offset is -96 dBc/Hz for the integer-N mode and degraded only by 3 dB for the fractional-N mode.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2007.05a
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• pp.24-29
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• 2007

Low-speed Diesel Engine, 7K60MC-S, in Power Plant have been experienced high vibration frequently since these units were completed the construction works, but they did not have any fundamental vibration solutions up to date. Therefore, several vibration tests and analyses are conducted to identify the root cause of high vibration and to suggest the optimal countermeasures for diesel engine. The 9.25Hz & 25.4Hz vibrations have been observed on main body during operation. The magnitude of engine upper structural vibration is generally similar in horizontal transverse direction. However, differences in the 'Fore' and 'After' vibration magnitude at 9.25Hz occurs due to the inertia momentum added by SCR duct system with the same vibration phase angle. It is analyzed that the excess structural vibration be occurred when the natural frequency of engine body is accessed the exciting sources due to the explosion pressure and the discharge pulsation of 7 cylinders in resonance range.