• Journal of the Korean Society of Manufacturing Process Engineers
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• v.18 no.4
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• pp.41-47
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• 2019

The advent of highly integrated, high-power electronics requires low a coefficient of thermal expansion performance to prevent delamination between the heat dissipation material and substrate. This paper reports a preliminary study on the manufacturing technology of gas reaction control composite material, focusing on the prediction of the thermal expansion coefficients of Al-AlN composite materials. We obtained numerical equivalent property values by using finite element analysis and compared the values with theoretical formulas. Al-AlN should become the optimal composite material when the proportion of the reinforcing phase is approximately 0.45.

• International Journal of Computer Science & Network Security
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• v.21 no.9
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• pp.230-238
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• 2021

A sensor network is made up of many sensors deployed in different areas to be monitored. They communicate with each other through a wireless medium. The routing of collected data in the wireless network consumes most of the energy of the network. In the literature, several routing approaches have been proposed to conserve the energy at the sensor level and overcome the challenges inherent in its limitations. In this paper, we propose a new low-energy routing protocol for power grids sensors based on an unsupervised clustering approach. Our protocol equitably harnesses the energy of the selected cluster-head nodes and conserves the energy dissipated when routing the captured data at the Base Station (BS). The simulation results show that our protocol reduces the energy dissipation and prolongs the network lifetime.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.95-100
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• 2010

LED (Light Emitting Diode) is 85% of the applied energy is converted into heat that is already well known. Lately, LED chips increasing the capacity as result delivered to increase the heat of the LED products and module that directly related to life span and degradation. Thus, in industry the high-power LED chip to control the heat generated during the course of the study and the existing aluminum, copper adhesives, and uses MLC (Metal clad laminate) structures using low-cost FR4 and copper CCL (Copper Clad Laminate) to reduce costs by changing to a study being carried out. In this study, using low-cost CCL Class, mounted 1W LED chip to analyze changes in the thermal resistance. In addition, heat dissipation in the CCL to facilitate a variety of thermal via design outside of the heat generated by the LED chip to control and facilitate the optimal structure of the heat dissipation is suggested.

• Journal of rehabilitation welfare engineering & assistive technology
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• v.7 no.2
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• pp.13-18
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• 2013

In this paper design a 8 bit Current Steering D/A Converter for stimulating neuron signal. Proposed circuit in paper shows the conversion rate of 10KS/s and the power supply of 3.3V with 0.35um Magna chip CMOS process using full custom layout design. It employes segmented structure which consists of 3bit thermometer decoders and 5bit binary decoder for decreasing glitch noise and increasing resolution. So glitch energy is down by $10nV{\bullet}sec$ rather than binary weighted type DAC. And it makes use of low power current stimulator because of low LSB current. And it can make biphasic signal by connecting with Micro Controller Unit which controls period and amplitude of signal. As result of measurement INL is +0.56/-0.38 LSB and DNL is +0.3/-0.4 LSB. It shows great linearity. Power dissipation is 6mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.26-34
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• 2007

This Paper describes a chip design technique for body composition analyzer based on the BIA (Bioelectrical Impedance Analysis) method. All the functions of signal forcing circuits to the body, signal detecting circuits from the body, Micom, SRAM and EEPROMS are integrated in one chip. Especially, multi-frequency detecting method can be applied with selective band pass filter (BPF), which is designed in weak inversion region for low power consumption. In addition new full wave rectifier (FWR) is also proposed with differential difference amplifier (DDA) for high performance (small die area low power consumption, rail-to-rail output swing). The prototype chip is implemented with 0.35um CMOS technology and shows the power dissipation of 6 mW at the supply voltage of 3.3V. The die area of prototype chip is $5mm\times5mm$.

• Journal of Digital Contents Society
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• v.16 no.1
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• pp.97-104
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• 2015

The conventional 1 Hall sensor-type water gauge has some defects that it can not detect counterflow and low-speed flow of water, and it also generates power consumption during even sleep mode. In this paper, a low-power consumption wireless digital remote water gauge with a counterflow detection capability is proposed. The proposed water gauge detects the direction and amount of water flow by using the three Hall sensors placed at $120^{\circ}$ intervals with 8-year national standard life durability. The water gauge with three Hall sensors works without error regardless of water speed does not generate power dissipation during sleep mode by presented reading algorithm for bew water gauge. The proposed water gauge is designed to send its ID, current time and counting value to repeater or central control center with specified frequency by RF Module.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.64-72
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• 1998

In this paper, the design of a current integrator for low-voltage, low-power, and high frequency applications using complementary high swing cascode current-mirror is presented. The proposed integrator decreases output current errors due to non-zero input resistance and non-infinite output resistance of the simple current integrator. As a design example, the 3rd order Butterworth lowpass filter is designed by a leapfrog method. Also, we apply the predistortion design method to reduce the magnitude distortion which occurs at a cutoff frequency by the undesirable phase shift of a lossless current integrator. The designed current-mode filter is simulated and examined by SPICE using 0.8$\mu\textrm{m}$ CMOS n-well process parameters. The simulation results show 20MHz cutoff frequency and 615㎼ power dissipation with a 2V power supply. And the cutoff frequency of the filters can be easily changed by the DC bias current.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2A
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• pp.129-136
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• 2005

A multiplier generator, VPM_Gen (Variable-Precision Multiplier Generator), which generates Verilog-HDL models of multiplier cores with user-defined bit-width specification, is described. The bit-widths of operands are parameterized in the range of $8-bit{\sim}32-bit$ with 1-bit step, and the product from multiplier core can be truncated in the range of $8-bit{\sim}64-bit$ with 2-bit step, resulting that the VPM_Gen can generate 3,455 multiplier cores. In the case of truncating multiplier output, by eliminating the circuits corresponding to the truncation part, the gate counts and power dissipation can be reduced by about 40% and 30%, respectively, compared with full-precision multiplier. As a result, an area-efficient and low-power multiplier core can be obtained. To minimize truncation error, an adaptive error-compensation method considering the number of truncation bits is employed. The multiplier cores generated by VPM_Gen have been verified using Xilinx FFGA board and logic analyzer.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.12 no.4
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• pp.61-68
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• 2013

As an advance study for the development of a heat sink for special purpose high power illumination, an investigation was made to find feasibility for the application of copper plated EP to a heat sink of small LED light of less than 10W installed in commercial product. In this study, the plated heat sink with EP copper was fabricated for the conventional LED light. It was used actually for finding heat radiation property and effectiveness of the heat sink accompanied with measurement of luminous intensity. The heat is radiated by transfer and dissipation only through the copper plated surface due to extremely low heat conductivity of EP in case of EP heat sink; however the total area of the plate plays the function of heat transfer as well as heat radiation in case of the aluminum heat sink. It seems that the volume difference of heat radiating material is so big that the temperature $P_1$ is 9.0~12.3% higher in 3W and 42.7~54.0% higher in case of 6W volume difference of heat radiating material is so big that the temperature $P_1$ is 9.0~12.3% higher in 3W and 42.7~54.0% higher in case of 6W even though heat transfer rate of copper is approximately 1.9 times higher than that of aluminum. It was thought that this is useful to utilize for heat sink for low power LED light with the low heating rate. Also, the illumination could be greatly influenced by the surrounding temperature of the place where it is installed. Therefore, it seems that the illumination installation environment must be taken into consideration when selecting illumination. Further study was expected on order to aims at development of an exterior surface itself made into heat radiation plate by application of this technology in future.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.53-60
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• 2005

Recently, sub-micron CMOS technologies have taken the place of III-V materials in a number of areas in integrated circuit designs, in particular even for the applications of gjgabit optical communication applications due to its low cost, high integration level, low power dissipation, and short turn-around time characteristics. In this paper, a four-channel transimpedance amplifier (TIA) array is realized in a standard 0.35mm CMOS technology Each channel includes an optical PIN photodiode and a TIA incorporating the fully differential regulated cascode (RGC) input configuration to achieve effectively enhanced transconductance(gm) and also exploiting the inductive peaking technique to extend the bandwidth. Post-layout simulations show that each TIA demonstrates the mid-band transimpedance gain of 59.3dBW, the -3dB bandwidth of 2.45GHz for 0.5pF photodiode capacitance, and the average noise current spectral density of 18.4pA/sqrt(Hz). The TIA array dissipates 92mw p in total from a single 3.3V supply The four-channel RGC TIA array is suitable for low-power, high-speed optical interconnect applications.