• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2009.05a
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• pp.458-461
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• 2009

In 3-phase 4 wire system, appearance of the $3^{rd}$ harmonic current by increasing non-liner load is the one of causes overheating neutral wire of power line, and apparatus. So it is necessary to protect power-factor decreasing by the $3^{rd}$ harmonic, and electric power apparatus, and line safely, in this study, power system accidents caused by the $3^{rd}$ harmonic were investigated, then harmonic components analysis and unbalanced load analysis got accomplished. As result, we proposed the method to protect the power line and apparatus from over-current of neutral line by using the most economic 4-pole low voltage circuit breaker.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.89-93
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• 2007

This paper presents the design and the implementation of input/output (I/O) interface circuits for 2.5 Gbps operation in a 3.3V 0.35um CMOS technology. Due to the differential transmission technique and low voltage swing, LVDS(low-voltage differential signaling) has been widely used for high speed transmission with low power consumption. This interface circuit is fully compatible with the LVDS standard. The LVDS proposed in this paper utilizes a telescopic amplifier. This circuit is operated up to 2.3 Gbps. The circuit has a power consumption of 25. 5mW. This circuit is designed with Samsung $0.35{\mu}m$ CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.563-569
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• 2015

For some low-frequency applications such as power-related circuits, NEM relays have been known to show better performance than MOSFETs. For example, in a step-down charge pump circuit, the NEM relays showed much smaller layout area and better energy efficiency than MOSFETs. However, severe process variations of NEM relays hinder them from being widely used in various low-frequency applications. To mitigate the process-variation problems of NEM relays, in this paper, a new NEM-relay charge pump circuit with the self-adjustment is proposed. By self-adjusting a pulse amplitude voltage according to process variations, the power consumption can be saved by 4.6%, compared to the conventional scheme without the self-adjustment. This power saving can also be helpful in improving the power efficiency of the proposed scheme. From the circuit simulation of NEM-relay charge pump circuit, the efficiency of the proposed scheme is improved better by 4.1% than the conventional.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.4
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• pp.363-368
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• 2015

This paper deals with an improved current source using full-bridge converter type for thyristor valve test of HVDC system. The conventional high-current and low-voltage source of synthetic test circuit requires additional auxiliary power supply to provide the reverse voltage for the auxiliary thyristor valve during turn-off process. The proposed circuit diagram to provide the reverse voltage is extremely simple because no additional component is required. The reverse voltage can be obtained from the input DC voltage of the high-current and low-voltage power supply. The operation principle and design method of the proposed system are described. Simulation and experimental results in scaled down STC of 200 V, 30 A demonstrate the validity of the proposed scheme.

• Journal of Power Electronics
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• v.19 no.3
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• pp.645-654
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• 2019

In this paper, a new high step up DC/DC converter with a modified super-lift technique is presented. The coupled inductor technique is combined with the super-lift technique to provide a tenfold or more voltage gain with a proper duty cycle and a low turn ratio. Due to a high conversion ratio, the voltage stress on the semiconductor devices is reduced. As a result, low voltage ultra-fast recovery diodes and low on resistance MOSFET can be used, which improves the reverse recovery problems and conduction losses. This converter employs a passive clamp circuit to recycle the energy stored in the leakage inductance. The proposed convertor features a high conversion ratio with a low turn ratio, low voltage stress, low reverse recovery losses, omission of the inrush currents of the switch capacitor loops, high efficiency, small volume and reduced cost. This converter is suitable for renewable energy applications. The operational principle and a steady-state analysis of the proposed converter are presented in details. A 200W, 30V input, 380V output laboratory prototype circuit is implemented to confirm the theoretical analysis.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.39-42
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• 2018

In this paper, a low-power MPPT interface circuit for vibration energy harvesting sources is presented. The designed circuit rectifies the harvested ac type energy to the dc type energy required to drive the system, and periodically samples and holds the open circuit voltage (Voc) through the MPPT controller, and transfers the harvested power to the load while maintaining the input voltage at 1/2 of the maximum available power point. All circuits have been designed using a 0.35-um CMOS technology, and the operation has been verified through simulation. Simulation results show that the designed circuit consumes 98nA of current at 3V input voltage and the maximum power efficiency is 99.21%. The designed chip occupies $1.281mm{\times}1.236mm$.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.2089-2091
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• 2000

Pulsed power systems consist of a capacitor bank, an isolated high-voltage charging power-supply, high-current bus-work for charging and discharging and a control system. In such pulsed power systems, the operating-lifetime of the capacitors is closely dependent on the voltage reversal. Hence, most capacitor-discharging systems includes crowbar circuits. The crowbar circuit prevents the capacitor recharging with reverse voltage. Usually it consists of crowbar resistors and high pulse-current diode-stacks connected in series. The requirements for the diode-stacks are fast-recovery time and high-voltage and large-current ratings, which results in the high cost of the pulsed-power system. This paper presents a protection scheme of a charging and discharging system of a 500kJ capacitor bank using a low-cost crowbar circuit and safety-fuses.

• ETRI Journal
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• v.44 no.3
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• pp.491-503
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• 2022

Metal-oxide-semiconductor field-effect transistors (MOSFETs) are continuously scaling down in the nanoscale region to improve the functionality of integrated circuits. The scaling down of MOSFET devices causes short-channel effects in the nanoscale region. In nanoscale region, leakage current components are increasing, resulting in substantial power dissipation. Very large-scale integration designers are constantly exploring different effective methods of mitigating the power dissipation. In this study, a transistor-level input-controlled stacking (ICS) approach is proposed for minimizing significant power dissipation. A low-power ICS approach is extensively discussed to verify its importance in low-power applications. Circuit reliability is monitored for process and voltage and temperature variations. The ICS approach is designed and simulated using Cadence's tools and compared with existing low-power and high-speed techniques at a 22-nm technology node. The ICS approach decreases power dissipation by 84.95% at a cost of 5.89 times increase in propagation delay, and improves energy dissipation reliability by 82.54% compared with conventional circuit for a ring oscillator comprising 5-inverters.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.2
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• pp.80-86
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• 2011

This paper presents an integrated variable amplitude high voltage pulse generation circuit with low power and small size for driving industrial piezoelectric printer heads. To solve the problems of large size and power overhead of conventional pulse generators that usually assembled with multiple high-cost discrete ICs on a PCB board, we have designed a new integrated circuit (IC) chip. Since all the functions are integrated on to a single-chip it can achieve low cost and control the high-voltage output pulse with variable amplitudes as well. It can also digitally control the rising and falling times of an output high voltage pulse by using programmable RC time control of the output buffer. The proposed circuit has been designed and simulatedd in a 180[nm] Bipolar-CMOS-DMOS (BCD) technology using HSPICE and Cadence Virtuoso Tools. The proposed single-chip pulse generation circuit is suitable for use in industrial printer heads requiring a variable high voltage driving capability.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.