• 한국전기전자재료학회논문지
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• 제23권9호
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• pp.667-670
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• 2010

In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.2246-2248
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• 1997

This paper presents a high-frequency inverter type high-voltage power supply for X-ray equipments. The high-voltage generator consist of an inverter unit including the SR(Series Resonance) type PSC(Phase-Shifted Control) PWM circuit adopting IGBT as the switching power device and high-voltage unit including the CW(Cockcroft Walton) circuit. When the X-ray equipment is radiographing at large power for a short time, this generator operates through feedback voltage mode control to obtain a high speed leading edge and low ripple. The operating modes and design consideration of the proposed power supply are given. Issues in the design of high-voltage divider for high voltage measuring. Experimental results are presented to verify the performance of the designed power supply for varying load conditions. The proposed apparatus has several advantages, e.g., the fast rising time of tube voltage, accuracy and reduced component size etc.

• 한국전자통신학회논문지
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• 제18권4호
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• pp.617-624
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• 2023

최근, 전자 제품의 소형화와 저소비전력화 및 향상된 효율과 역률개선이 큰 관심 사항이 되고 있다. 본 논문에서는 PWM 제어기반의 AC-DC 컨버터를 설계, 제작하였다. AC-DC 컨버터는 하나의 정류회로와 하나의 출력전압 제어 회로가 직렬로 연결되는 구조로 설계하였으며, 정류회로는 다이오드 기반 단상 전파전류 회로, 출력전압 제어 회로는 PWM 제어기반의 DC-DC 변환 회로를 적용하였다. PWM 제어를 위한 주 제어장치로 아두이노를 이용하였으며, LCD를 출력 단에 구성하여 제어 결과를 확인할 수 있도록 하였다. 시험회로를 통한 반복 실험들을 통해서 오실로스코프와 LCD에 디스플레이 되는 출력전압과 목표 출력전압의 오차를 확인하였으며, 오실로스코프 측정값을 기준으로 약 5%의 오차율을 보임으로써 제안된 설계 방법론의 유효성을 확인할 수 있었다.

• 전력전자학회논문지
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• 제6권6호
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• pp.564-571
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• 2001

본 논문은 휴대용 기기를 위한 고효율의 저전압용 DC/DC 컨버터의 고집적회로에 관한 연구이다. 컨버터의 모든 능동 소자들은 0.65$\mu\textrm{m}$표준 CMOS 공정을 사용하여 단일 칩으로 구현하였다 수종 소자들의 크기를 줄이기 위해서 1MHz의 주파수에서 동작하며 높은 주파수에서 의스위칭 손실을 최소화하기 위하여 ZVS 방식으로 설계하였다. 시뮬레이션 결과 출력 전압이 2V일때 1W의 출력을 가지며 full 부하에서 95%의 효율을 보였다.

• ETRI Journal
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• 제31권6호
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• pp.725-731
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• 2009

In this paper, electrostatic discharge (ESD) protection circuits with an advanced substrate-triggered NMOS and a gate-substrate-triggered NMOS are proposed to provide low trigger voltage, low leakage current, and fast turn-on speed. The proposed ESD protection devices are designed using 0.13 ${\mu}m$ CMOS technology. The experimental results show that the proposed substrate-triggered NMOS using a bipolar transistor has a low trigger voltage of 5.98 V and a fast turn-on time of 37 ns. The proposed gate-substrate-triggered NMOS has a lower trigger voltage of 5.35 V and low leakage current of 80 pA.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권1호
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• pp.1-10
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• 2007

In recent few years, low-power electronics has been a leading drive for technology developments nourished by rapidly growing market share. Mobile DRAM, as a fundamental block of hand-held devices, is now becoming a product developed by limitless competition. To support application specific mobile features, various new power-reduction schemes have been proposed and adopted by standardization. Tightened power budget in battery-operated systems makes conventional schemes not acceptable and increases difficulty of the circuit design. The mobile DRAM has successfully moved down to 1.5V era, and now it is about to move to 1.2V. Further voltage scaling, however, presents critical problems which must be overcome. This paper reviews critical issues in mobile DRAM design and various circuit schemes to solve the problems. Focused on analog circuits, bitline sensing, IO line sensing, refresh-related schemes, DC bias generation, and schemes for higher data rate are covered.

• Journal of Power Electronics
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• 제13권4호
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• pp.626-635
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• 2013

An analysis of the junction capacitance in resonant rectifiers which has a significant impact on the operating point of resonance circuits is studied in this paper, where the junction capacitance of the rectifier diode is to decrease the resonant current and output voltage in the circuit when compared with that in an ideal rectifier diode. This can be represented by a simplified series resonant equivalent circuit and a voltage transfer function versus the normalized operating frequency at varied values of the resonant capacitor. A low voltage to high voltage push-pull DC/DC resonant converter was used as a design example. The design procedure is based on the principle of the half bridge class-DE resonant rectifier, which ensures more accurate results. The proposed scheme provides a more systematic and feasible solution than the conventional resonant push-pull DC/DC converter analysis methodology. To increase circuit efficiency, the main switches and the rectifier diodes can be operated under the zero-voltage and zero-current switching conditions, respectively. In order to achieve this objective, the parameters of the DC/DC converter need to be designed properly. The details of the analysis and design of this DC/DC converter's components are described. A prototype was constructed with a 62-88 kHz variable switching frequency, a 12 $V_{DC}$ input voltage, a 380 $V_{DC}$ output voltage, and a rated output power of 150 W. The validity of this approach was confirmed by simulation and experimental results.

• 한국정보통신학회논문지
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• 제8권8호
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• pp.1705-1712
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• 2004

본 논문에서는 5.25GHz 저잡음 증폭기(LNA)에 대해 전압이득, 잡음지수 및 입력 임피던스를 측정할 수 있는 새로운 형태의 저가 고주파 BIST(Built-In Self-Test, 자체내부검사)회로 설계 및 검사 기술을 제안한다. 이러한 BIST 회로는 0.18$\mu\textrm{m}$ SiGe 공정으로 제작되어 있다. 이러한 접근방법은 입력 임피던스 정합과 출력 전압 측정원리를 이용한다. 본 논문에서 제안하는 방법은 측정이 간단하고 비용이 저렴하다는 장점이 있다. BIST 회로가 차지하는 면적은 LNA가 차지하는 전체면적의 약 18%에 불과하다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2004년도 춘계종합학술대회
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• pp.635-641
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• 2004

본 논문에서는 802.113 무선 근거리 통신망(wireless LAM)용 5.25GHz 저잡음 증폭기(LNA)에 대해 고가 장비를 사용하지 않고도 전압이득, 잡음지수 및 입력 임피던스를 측정할 수 있는 새로운 형태의 고주파 81ST(Built-In Self-Test, 자체내부검사)회로 설계 및 검사 기술을 제안한다. 본 연구에서 제작된 BIST 회로는 기존의 고가 검사 장비 대신 고주파 회로의 결함검사나 성능검사에 적용될 수 있다. 이러한 BIST 회로는 1V의 공급전압에서 동작하며, 0.18$\mu\textrm{m}$ SiGe 공정으로 제작되어 있다. 이러한 접근방법은 입력 임피던스 정합과 출력 전압 측정을 이용한다. 본 방법에서는 DUT(Device Under Test: 검사대상이 되는 소자)와 BIST 회로가 동일 칩 상에 설계되어 있기 때문에 측정할 때 단지 디지털 전압계와 고주파 전압 발생기만이 필요하며, 측정이 간단하고 비용이 저렴하다는 장점이 있다. BIST 회로가 차지하는 면적은 LNA가 차지하는 전체면적의 약 18%에 불과하다.

• 조명전기설비학회논문지
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• 제25권6호
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• pp.9-17
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• 2011

The high-power LED (Light Emitting Diode) which is recently gaining popularity as a digital light source has such advantages as low power consumption, long life, fast switching speed, and high efficiency. Thus, many efforts are being made to use the high-power LEDs for general lighting. This paper proposes LED driving circuit uses a DC/DC converter that can recover energy to compensate for the current variations caused by changes in LED equivalent resistance following a temperature change instead of serial resistance. The maximum input voltage of this DC/DC converter has low voltage variations by temperature change when the rated current is formed. In order to return current to the input side, we need a high boosting at low power. Thus, to improve the low efficiency of power converter, the power converter can be configured in such a way to gather the powers of low-capacity DC/DC converters and return the total power. Experiments showed that the proposed system improved efficiency compared to the conventional LED drive using the existing DC/DC converter.