• 제목/요약/키워드: low swing

검색결과 261건 처리시간 0.025초

젊은 성인의 계단과 경사로 오르기 동안 하지의 근활성도 변화 연구 (The Study of Muscle Activity Change with Lower Extremity during Stair and Ramp Walking in Young Adults)

  • 한진태;남태호;신형수;배성수
    • 대한물리의학회지
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    • 제3권3호
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    • pp.177-183
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    • 2008
  • Purpose : The purpose of this study was to investigate characteristics of the muscle activities during level walking and stairs ascending in young adults. Methods : Fifteen young adult were recruited this study. Muscle activity (BIOPAC System Inc., Santa Barbara, U.SA). Statistical analysis was difference between level and stair walking. Results : In stance phase, muscle activity of low extremity generally more increased during ramp ascent both young adults. In swing phase, muscle activity of low extremity generally more increased during stairs ascent in young adults. Conclusion : These results indicate that stair and ramp ascent is more difficult task than level walking in young adults. Muscle activity was more changed at ramp ascent. In the future, we suggest that studies of stair and ramp gait pattern regarding ambulatory patient with disabilities be further studied and an appropriate stairs and ramp inclination will be indicated.

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Experimental investigation on flow field around a flapping plate with single degree of freedom

  • Hanyu Wang;Chuan Lu;Wenhai Qu;Jinbiao Xiong
    • Nuclear Engineering and Technology
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    • 제55권6호
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    • pp.1999-2010
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    • 2023
  • Undesirable flapping motion of discs can cause the failure of swing check valves in nuclear passive safety systems. Time-resolved particle image velocimetry (PIV) was employed to investigate the flow characteristics around a free-to-rotate plate and the motion response, with the Reynolds numbers, based on the hydraulic diameter of the channel, from 1.32 × 104 to 3.95 × 104. Appreciable flapping motion (±3.52°) appeared at the Reynolds number of 2.6 × 104 with the frequency of 5.08 Hz. In the low-Reynolds-number case, the plate showed negligible flapping. In the high-Reynolds-number case, the deflection angle increased with reduced flapping amplitude. The torque from the fluid determined the flapping amplitude. In the low-Reynolds-number case, Karman vortices were absent. With increasing Reynolds numbers, Karman vortices developed behind the plate with larger deflection angles. Strong interaction between the wake flow from the leading and trailing edge of the plate was observed. Based on power spectrum density (PSD) analysis, the vortex shedding frequency coincided with the flapping frequency, and the amplitude was positively correlated to the strength of the vortices. Proper orthogonal decomposition (POD) modes evince that, in the case of appreciable motion, coherent structures exhibited a larger spatial scale, enhancing the magnitude of the external torque on the plate.

MIPI D-PHY를 위한 2-Gb/s SLVS 송신단 (A 2-Gb/s SLVS Transmitter for MIPI D-PHY)

  • 백승욱;정동길;박상민;황유정;장영찬
    • 한국산업정보학회논문지
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    • 제18권5호
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    • pp.25-32
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    • 2013
  • 고속 저전력 모바일 응용분야를 위한 1.8V 2-Gb/s scalable low voltage signaling (SLVS) 송신단을 제안한다. 제안하는 송신단은 데이터 전송을 위한 4-lane 송신단, 소스 동기 클록 방식을 위한 1-lane 송신단, 그리고 8-phase 클록 발생기로 구성된다. 제안하는 SLVS 송신단은 50 mV에서 650 mV의 출력 전압 범위를 가지며 고속 동작 모드와 저전력 모드를 제공한다. 또한, signal integrity를 개선하기 위한 출력 드라이버의 임피던스 교정 기법이 제안된다. 제안하는 SLVS 송신단은 1.8 V의 공급 전압을 가지는 0.18-${\mu}m$ 1-poly 6-metal CMOS 공정을 이용하여 구현된다. 구현된 SLVS 송신단의 데이터 jitter의 시뮬레이션 결과는 2-Gb/s의 데이터 전송속도에서 8.04 ps이다. 1-lane을 위한 SLVS 송신단의 면적과 전력소모는 각각 $422{\times}474{\mu}m^2$와 5.35 mW/Gb/s이다.

4비트 ADC 반복구조를 이용한 저전력 전류모드 12비트 ADC (A Low Power Current-Mode 12-bit ADC using 4-bit ADC in cascade structure)

  • 박소연;김형민;이대니얼주헌;김성권
    • 한국전자통신학회논문지
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    • 제14권6호
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    • pp.1145-1152
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    • 2019
  • 본 논문에서는 디지털 회로와 저소비전력 및 고속연산의 장점을 가진 아날로그 회로를 혼용하기 위하여, 저전력 전류모드 12비트 ADC(: Analog to Digital Converter)를 제안하였다. 제안하는 12비트 ADC는 4비트 ADC의 cascade 구조를 사용하여 소비전력을 줄일 수 있었으며, 변환 current mirror 회로를 사용해 칩면적을 줄일 수 있었다. 제안된 ADC는 매그나칩/SK하이닉스 350nm 공정으로 구현하였고, Cadence MMSIM을 사용하여 post-layout simulation를 진행하였다. 전원전압 3.3V에서 동작하고, 면적은 318㎛ x 514㎛를 차지하였다. 또한 제안하는 ADC는 평균 소비전력 3.4mW의 저소비전력으로 동작하는 가능성을 나타내었다.

접지기반 차동신호 전송을 위한 저전력 4-Gb/s 수신단 설계 (Low Power 4-Gb/s Receiver for GND-referenced Differential Signaling)

  • 이미라;김석;정영균;배준한;권기원;전정훈
    • 전자공학회논문지
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    • 제49권9호
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    • pp.244-250
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    • 2012
  • 본 논문에서는 접지기반의 저전압 차동 입력 신호를 전달 받는 수신단에 대해 기술하였다. 공통게이트단으로 구성된 레벨시프터와 실시간 선형 이퀄라이저를 이용하여, 채널을 통과하며 왜곡된 신호의 전압 마진과 시간 마진을 확보하였다. 입력 신호의 공통모드 전압이 변하더라도, 레벨시프터에 공급되는 전류의 양을 일정하게 유지 할 수 있는 바이어스 회로를 추가하였다. 저전력 65-nm CMOS 공정으로 수신단회로를 구현하고 측정하였다. -19.7dB의 감쇄를 보이는 FR4 PCB 채널을 통해 4-Gb/s 400mVp-p 차동 신호를 수신단으로 전달하였을 때 $10^{-11}$ BER기준 0.48UI의 시간 마진을 얻을 수 있었으며, 0.30mW/Gb/s의 낮은 전력 소모를 유지하였다.

Inductorless 8.9 mW 25 Gb/s 1:4 DEMUX and 4 mW 13 Gb/s 4:1 MUX in 90 nm CMOS

  • Sekiguchi, Takayuki;Amakawa, Shuhei;Ishihara, Noboru;Masu, Kazuya
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권3호
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    • pp.176- 184
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    • 2010
  • A low-power inductorless 1:4 DEMUX and a 4:1 MUX for a 90 nm CMOS are presented. The DEMUX can be operated at a speed of 25 Gb/s with the power supply voltage of 1.05 V, and the power consumption is 8.9 mW. The area of the DEMUX core is $29\;{\times}\;40\;{\mu}m^2$. The operation speed of the 4:1 MUX is 13 Gb/s at a power supply voltage of 1.2 V, and the power consumption is 4 mW. The area of the MUX core is $30\;{\times}\;18\;{\mu}m^2$. The MUX/DEMUX mainly consists of differential pseudo-NMOS. In these MUX/DEMUX circuits, logic swing is nearly rail-to-rail, and a low $V_{dd}$. The component circuit is more scalable than a CML circuit, which is commonly used in a high-performance MUX/DEMUX. These MUX/DEMUX circuits are compatible with conventional CMOS logic circuit, and it can be directly connected to CMOS logic gates without logic level conversion. Furthermore, the circuits are useful for core-to-core interconnection in the system LSI or chip-to-chip communication within a multi-chip module, because of its low power, small footprint, and reasonable operation speed.

고유전 $MgO_{0.3}BST_{0.7}$ 게이트 절연막을 이용한 $InGaZnO_4$ 기반의 트랜지스터의 저전압 구동 특성 연구 (Low voltage operating $InGaZnO_4$ thin film transistors using high-k $MgO_{0.3}BST_{0.7}$ gate dielectric)

  • 김동훈;조남규;장영은;김호기;김일두
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.40-40
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    • 2008
  • $InGaZnO_4$ based thin film transistors (TFTs) are of interest for large area and low cost electronics. The TFTs have strong potential for application in flat panel displays and portable electronics due to their high field effect mobility, high on/off current ratios, and high optical transparency. The application of such room temperature processed transistors, however, is often limited by the operation voltage and long-tenn stability. Therefore, attaining an optimum thickness is necessary. We investigated the thickness dependence of a room temperature grown $MgO_{0.3}BST_{0.7}$ composite gate dielectric and an $InGaZnO_4$ (IGZO) active semiconductor on the electrical characteristics of thin film transistors fabricated on a polyethylene terephthalate (PET) substrate. The TFT characteristics were changed markedly with variation of the gate dielectric and semiconductor thickness. The optimum gate dielectric and active semiconductor thickness were 300 nm and 30 nm, respectively. The TFT showed low operating voltage of less than 4 V, field effect mobility of 21.34 cm2/$V{\cdot}s$, an on/off ratio of $8.27\times10^6$, threshold voltage of 2.2 V, and a subthreshold swing of 0.42 V/dec.

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고속 LVDS 응용을 위한 전송선 분석 및 설계 최적화 (Analysis and Design Optimization of Interconnects for High-Speed LVDS Applications)

  • 류지열;노석호
    • 대한전자공학회논문지SD
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    • 제46권10호
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    • pp.70-78
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    • 2009
  • 본 논문에서는 고속 저전압 차동 신호(Low-Voltage Differential Signaling, LVDS) 전송방식의 응용을 위한 전송선 분석 및 설계 최적화 방법을 제안한다. 차동 전송 경로 및 저전압 스윙 방법의 발전으로 인해 저전압 차동 신호 전송방식은 데이터 통신 분야, 고 해상도 디스플레이 분야, 평판 디스플레이 분야에서 매우 적은 소비전력, 개선된 잡음 특성 및 고속 데이터 전송률을 제공한다. 본 논문은 차동 유연성 인쇄 회로 보드(flexible printed circuit board, FPCB) 전송선에서 선 폭, 선 두께 및 선간격과 같은 전송선 설계 변수들의 최적화 기법을 이용하여 직렬 접속된 전송선에서 발생하는 임피던스 부정합과 신호 왜곡을 감소시키기 위해 개선 모델과 개발된 수식을 제안한다. 이러한 차동 FPCB 전송선의 고주파 특성을 평가하기 위해 주파수 영역에서 전파(full-wave) 전자기 시뮬레이션 및 시간 영역 시뮬레이션을 각각 수행하였다. 본 논문에서 제안하는 방법은 저전압 차동 신호 방식의 응용을 위한 고속 차동 FPCB 전송선을 최적화하는데 매우 도움이 되리라 믿는다.

승마 평보 시 숙련자의 등자길이 피팅에 따른 기승자세정열의 운동학적 비교분석 (Kinematic Analysis of The Rider Postural Alignments According to The Fitting of Stirrups Lengths during Horse Walk of High Level Rider)

  • 류재청;현승현
    • 한국운동역학회지
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    • 제24권4호
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    • pp.329-338
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    • 2014
  • The purpose of this study was to analyze of the rider postural alignments according to the fitting of stirrups lengths during walk of high level riders. Participants selected as subject were consisted of horse riders of high level (age: $47.66{\pm}3.51yrs$, height: $168.40{\pm}4.84cm$, body weight: $73.36{\pm}15.58kg$, low extremity length: $94.76{\pm}3.98cm$, career: $23.33{\pm}5.77yrs$) and walk with 3 types of stirrup lengths(ratio of low extremity 68.04%, 73.25%, 78.48%). The variables analyzed were consisted of the displacement of Y axis (center of mass, head, thigh, shank and foot), FR angle, LR angle, dynamic postural stability index (DPSI), coefficient of variation (CV%), and distance (X axis) of low extremity limb between right and left. The displacement of Y axis in COM, thigh, shank, foot limbs were not statistically significant, but movements of head showed greater distance of B type and C type than that of A type during 1 stride of walk. The FR and LR angle in trunk of horse rider, dynamic postural stability index and, coefficient of variation didn't show significant difference statistically according to the fitting of stirrup lengths. Also the distance (X axis) of low extremity in thigh and shank didn't show significant difference statistically in between right and left, but right and left foot showed greater distance in C type than that of B and A types during walk in horse back riding. The hip and ankle joint angle not statistically significant according to stirrups lengths, But knee joint angle showed more extended according to the increase of stirrups lengths during stance and swing phase in walk.

InGaZnO active layer 두께에 따른 thin-film transistor 전기적인 영향

  • 우창호;김영이;안철현;김동찬;공보현;배영숙;서동규;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.5-5
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    • 2009
  • Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

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