• 제목/요약/키워드: low output

검색결과 3,779건 처리시간 0.027초

전동기 친화형 출력필터를 이용한 영구자석 동기전동기의 센서리스 구동 성능 향상 (Performance Improvement of Sensorless PMSM Drives using Motor Friendly Output Filter)

  • 부한영;백승훈;한상훈;조영훈
    • 전력전자학회논문지
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    • 제25권4호
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    • pp.329-332
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    • 2020
  • A back-electromotive force (back-EMF) estimator for a permanent magnet synchronous motor (PMSM) uses the three-phase voltage references of a current controller to estimate rotor position. However, owing to voltage drops caused by the nonlinear characteristics of switches and passive components, the actual voltage in the motor and the three-phase voltage reference may not match. This study proposes a sensorless control method using a sine-wave output filter applied between the motor drive system and PMSM. The precise voltage in the motor can be measured with the sine-wave output filter and applied to the input of the estimator. Moreover, given that the voltage in the motor can be measured precisely at extremely low speeds, the stable operation range of the back-EMF estimator can be secured. Experimental results show that the proposed sensorless control method has stable operation at extremely low speeds compared with conventional sensorless control.

서미스터를 이용하여 출력 전압 리플을 향상시킨 히스테리틱 벅 변환기 (Hysteretic Buck Converter with Thermister to Improve Output Ripple Voltage)

  • 이동훈;윤광섭
    • 전기전자학회논문지
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    • 제18권1호
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    • pp.128-133
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    • 2014
  • 본 논문에서는 출력 리플 전압을 온도에 따라 개선시킬 수 있는 서미스터를 이용한 히스테리틱 벅 변환기를 제안한다. 회로가 민감 할 수 있는 높은 온도에서는 두 비교 전압을 비교적 크게 결정하지만, 회로가 안정적으로 동작 할 수 있는 온도에서는 두 비교 전압을 작게 결정하여, 출력 리플 전압을 최소화 시킨다. 모의실험결과는 출력 리플 전압을 30mV이상 감소시켰으며, 로드 레귤레이션은 0.011mV/mA 이다. 제안하는 회로는 빠른 응답과 저 전력이 요구되는 디지털 회로를 구동하는 전원 관리 회로로서 활용되기 적합하다.

유동형 미세 열유속 센서의 설계 (Design of The Micro Fluidic Heat Flux Sensor)

  • 김정균;조성천;이선규
    • 한국정밀공학회지
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    • 제26권11호
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    • pp.138-145
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    • 2009
  • A suspended membrane micro fluidic heat flux sensor that is able to measure the heat flow rate was designed and fabricated by a complementary-metal-oxide-semiconductor-compatible process. The combination of a thirty-junction gold and nickel thermoelectric sensor with an ultralow noise preamplifier, low pass filter, and lock-in amp has enabled the resolution of 50 nW power and provides the sensitivity of $11.4\;mV/{\mu}W$. The heater modulation method was used to eliminate low frequency noises from sensor output. It is measured with various heat flux fluid of DI-water to test as micro fluidic application. In order to estimate the heat generation of samples from the output measurement of a micro fluidic heat-flux sensor, a methodology for modeling and simulating electro-thermal behavior in the micro fluidic heat-flux sensor with integrated electronic circuit is presented and validated. The electro-thermal model was constructed by using system dynamics, particularly the bond graph. The electro-thermal system model in which the thermal and the electrical domain are coupled expresses the heat generation of samples converts thermal input to electrical output. The proposed electro-thermal system model shows good agreement with measured output voltage response in transient state and steady-state.

Analysis and Control of a Modular MV-to-LV Rectifier based on a Cascaded Multilevel Converter

  • Iman-Eini, Hossein;Farhangi, Shahrokh;Khakbazan-Fard, Mahboubeh;Schanen, Jean-Luc
    • Journal of Power Electronics
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    • 제9권2호
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    • pp.133-145
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    • 2009
  • In this paper a modular high performance MV-to-LV rectifier based on a cascaded H-bridge rectifier is presented. The proposed rectifier can directly connect to the medium voltage levels and provide a low-voltage and highly-stable DC interface with the consumer applications. The input stage eliminates the necessity for heavy and bulky step-down transformers. It corrects the input power factor and maintains the voltage balance among the individual DC buses. The second stage includes the high frequency parallel-output DC/DC converters which prepares the galvanic isolation, regulates the output voltage, and attenuates the low frequency voltage ripple ($2f_{line}$) generated by the first stage. The parallel-output converters can work in interleaving mode and the active load-current sharing technique is utilized to balance the load power among them. The detailed analysis for modeling and control of the proposed structure is presented. The validity and performance of the proposed topology is verified by simulation and experimental results.

3상 PWM 인버터의 단일제어루프 전압제어기의 설계 및 제어 (Design and control of Single Loop Output Voltage Controller for 3 Phase PWM Inverter)

  • 강병희;고재석;조준석;최규하;곽철훈;김진홍
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.496-500
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    • 2001
  • There are two ways in the output voltage control method in PWM inverter. One is the double loop voltage control composed of inner current control loop and outer voltage control loop. Because it shows fast response and low steady state error, utilized in many application. The Other is single loop voltage control method composed of voltage control loop only. It's characteristics shows lower performance in case of high output impedance than double loop voltage control. But in low output impedance, it shows good control performance in all load range than double loop control. In this paper, single loop voltage control rule and gain was developed analytically, and these were verified through computer simulation and experiment.

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Dual-Output Single-Stage Bridgeless SEPIC with Power Factor Correction

  • Shen, Chih-Lung;Yang, Shih-Hsueh
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.309-318
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    • 2015
  • This study proposes a dual-output single-stage bridgeless single-ended primary-inductor converter (DOSSBS) that can completely remove the front-end full-bridge alternating current-direct current rectifier to accomplish power factor correction for universal line input. Without the need for bridge diodes, the proposed converter has the advantages of low component count and simple structure, and can thus significantly reduce power loss. DOSSBS has two uncommon output ports to provide different voltage levels to loads, instead of using two separate power factor correctors or multi-stage configurations in a single stage. Therefore, this proposed converter is cost-effective and compact. A magnetically coupled inductor is introduced in DOSSBS to replace two separate inductors to decrease volume and cost. Energy stored in the leakage inductance of the coupled inductor can be completely recycled. In each line cycle, the two active switches in DOSSBS are operated in either high-frequency pulse-width modulation pattern or low-frequency rectifying mode for switching loss reduction. A prototype for dealing with an $85-265V_{rms}$ universal line is designed, analyzed, and built. Practical measurements demonstrate the feasibility and functionality of the proposed converter.

Step-One in Pre-regulator Boost Power-Factor-Correction Converter Design

  • Orabi, Mohamed;Ninomiya, Tamotsu
    • Journal of Power Electronics
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    • 제4권1호
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    • pp.18-27
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    • 2004
  • The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

푸시 풀 포워드 컨버터의 주파수 변화, 변압기의 권선비와 1차측 권선 변화에 대한 효율 특성 (Push Pull Forward Converter Efficiency Quility)

  • 전준석;김창선;김태식;임범선;우승훈
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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    • pp.36-39
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    • 2003
  • The push pull forward converter is a very suitable circuit for low output voltage, high output current applications with a wide input voltage range. All the magnetic components (output inductor, transformer, input filter) can be integrated into a single core. The integrated magnetics can reduce the number of the magnetic components. Developed the push pull forward converter rating are of 36 $\~$72V input and 3.3V/30A output. In this converter, the efficiency was measured by $76.4\%$ at full load and 82.95$\%$ at full load. The maximum efficiency is up to 83.$\%$ at 200kHz switching frequency, l1A output.

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Time-Discretization of Nonlinear Systems with Time Delayed Output via Taylor Series

  • Yuanliang Zhang;Chong Kil-To
    • Journal of Mechanical Science and Technology
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    • 제20권7호
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    • pp.950-960
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    • 2006
  • An output time delay always exists in practical systems. Analysis of the delay phenomenon in a continuous-time domain is sophisticated. It is appropriate to obtain its corresponding discrete-time model for implementation via a digital computer. A new method for the discretization of nonlinear systems using Taylor series expansion and the zero-order hold assumption is proposed in this paper. This method is applied to the sampled-data representation of a nonlinear system with a constant output time-delay. In particular, the effect of the time-discretization method on key properties of nonlinear control systems, such as equilibrium properties and asymptotic stability, is examined. In addition, 'hybrid' discretization schemes resulting from a combination of the 'scaling and squaring' technique with the Taylor method are also proposed, especially under conditions of very low sampling rates. A performance of the proposed method is evaluated using two nonlinear systems with time-delay output.

Design and Implementation of a Multi Level Three-Phase Inverter with Less Switches and Low Output Voltage Distortion

  • Ahmed, Mahrous E.;Mekhilef, Saad
    • Journal of Power Electronics
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    • 제9권4호
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    • pp.593-603
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    • 2009
  • This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.