• ETRI Journal
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• v.25 no.5
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• pp.356-368
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• 2003

This paper analyzes the characteristics of packet losses in mobile computing environments based on the Gilbert model and then describes a mechanism that can recover the lost audio packets using redundant data. Using information periodically reported by a receiver, the sender dynamically adjusts the amount and offset values of redundant data with the constraint of minimizing the bandwidth consumption of wireless links. Since mobile computing environments can be often characterized by frequent and consecutive packet losses, loss recovery mechanism need to deal efficiently with both random and consecutive packet losses. To achieve this, the suggested mechanism uses relatively large, discontinuous exponential offset values. That gives the same effect as using both the sequential and interleaving redundant information. To verify the effectiveness of the mechanism, we extended and implemented RTP/RTCP and applications. The experimental results show that our mechanism, with an exponential offset, achieves a remarkably low complete packet loss rate and adapts dynamically to the fluctuation of the packet loss pattern in mobile computing environments.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.29 no.6 s.237
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• pp.913-920
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• 2005

Compared to previous in-vitro test, FE model showed reliable motion patterns. A finite element model of a 50th percentile male neck was developed to study the mechanics of whiplash injury while the rear impacts. The model was consisted of the whole cervical vertebrae including part of occipital, intervertebral discs. which were modeled using linear viscoelastic materials and posterior elements. The sliding interfaces were defined to simulate contact phenomena in facet joints and in odontoid process. All ligaments and atlanto-occipital membrane were modeled as nonlinear bar elements. Only muscle elements were not considered. Motion of each cervical vertebra was obtained from the dynamic simulation with a MADYMO model for 15 km/h $40\%$ rear end offset impacts. Soft tissue neck injury(STNI) was investigated with a developed FE model. In FE model analysis, the high stress was appeared at C3/C4 disc in offset impact. Further research is still needed in order to improve the developed neck FE model for many different crash patterns.

• Proceedings of the KSME Conference
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• 2004.04a
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• pp.1237-1242
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• 2004

In this study, single-phase heat transfer experiments were conducted with oil cooler with offset strip fin using water. An experimental water loop has been developed to measure the single-phase heat transfer coefficient in a vertical oil cooler. Downflow of hot water in one channel receives heal from the cold water upflow of water in the other channel. Similar to the case of a plate heat exchanger, even at a very low Reynolds number, the flow in the on cooler with offset strip fin remains turbulent. The present data show that the heat transfer coefficient increases with the Reynolds number. Based. On the present data, empirical correlation of the heat transfer coefficient was proposed. Also, performance prediction analysis for oil cooler were executed and compared with experiments. ${\varepsilon}-NTU$ method was used in this prediction program. Independent variables are flow rates and inlet temperature. Compared with experimental data, the accuracy of the program is within the error bounds of ${\pm}5$% in the heat transfer rate.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.451-460
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• 2008

Gregorian offset dual-shaped reflector antennas have been widely used in the satellite communication systems for their high gain and low sidelobe characteristics. However, in this paper, it is designed as the CATR(Compact Antenna Test Range) reflector system, and its near-field characteristics are investigated. The CATR facility needs to provide an uniform plane wave with the minimum amplitude and phase ripple and the low cross polarization to the test region. Therefore, the reflector near-field patterns are calculated and presented with the variations of the aperture power distribution, the feed horn pattern, and the distance from the aperture to the test zone. Also, the offset dual-shaped reflector is fabricated at 30 GHz, and its near-field patterns are measured. The measured results are in good agreement with the calculated results. From theses results, we confirm that the designed offset dual-shaped reflector can be used as the reflector system for the compact antenna test range.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.6
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• pp.477-481
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• 2014

Flexible electronics have been to the fore because it is believed that flexibility can add incredible value such as light weight and mobility into the existing electronic devices and create new markets of large-area and low-cost electronics such as wearable eletronics in near future. Offset printing processes are regarded as major candidates for manufacturing the flexible electronics because they can provide the patterning resolution of micron-size effectively in large-area. In view of mechanics, the most important viewpoint in offset printing is how to achieve the synchronized movement of two contact surfaces in order to prevent slip between two contact surfaces and distortion of the blanket surface during ink transfer so that the high-resolution and good-overlay patterns can be printed. In this paper, a novel low-cost measurement method of the synchronization error using the motor control output signals is proposed and the compensation method is presented to minimize the synchronization error.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.60-67
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• 2008

A low-power 2.4GHz fractional-N frequency synthesizer has been designed for 2.4GHz ISM band applications such as Bluetooth, Zigbee, and WLAN. To achieve low-power characteristic, the design has been focused on the power optimization of power-hungry blocks such as VCO, prescaler, and ${\Sigma}-{\Delta}$ modulator. An NP-core type VCO is adopted to optimize both phase noise and power consumption. Dynamic D-F/Fs with no static DC current are employed in designing the low-power prescaler circuit. The ${\Sigma}-{\Delta}$ modulator is designed using a modulus mapping circuit for reducing hardware complexity and power consumption. The designed frequency synthesizer which was fabricated using a $0.18{\mu}m$ CMOS process consumes 7.9mA from a single 1.8V supply voltage. The experimental results show that a phase noise of -118dBc/Hz at 1MHz offset, the reference spur of -70dBc at 25MHz offset, and the channel switching time of $15{\mu}s$ over 25MHz transition have been achieved. The designed chip occupies an area of $1.16mm^2$ including pads where the core area is only $0.64mm^2$.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.175-178
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• 2005

In this paper, a carrier frequency offset (CFO) estimator is proposed for the interleaved OFDMA uplink systems. It is based on the estimation of signal parameters via rotational invariance technique (ESPRIT). Compared with the Cao's estimator, the proposed estimator has low computational complexity. Simulation results demonstrate that the proposed estimator performs better than Cao's estimator at the relatively low SNR region. Hence, the proposed estimator is more applicable to the practical environments than the Cao’s estimator.

• Journal of IKEEE
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• v.3 no.1 s.4
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• pp.39-49
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• 1999

This paper describes a 1 GHz, low-phase-noise CMOS fractional-N frequency synthesizer with an integrated LC VCO. The proposed frequency synthesizer, which uses a high-order delta-sigma modulator to suppress the fractional spurious tones at all multiples of the fractional frequency resolution offset, has 64 programmable frequency channels with frequency resolution of $f_ref/64$. The measured phase noise is as low as -110 dBc/Hz at a 200 KHz offset frequency from a carrier frequency of 980 MHz. The reference sideband spurs are -73.5 dBc. The prototype is implemented in a $0.5{\mu}m$ CMOS process with triple metal layers. The active chip area is about $4mm^2$ and the prototype consumes 43 mW, including the VCO buffer power consumption, from a 3.3 V supply voltage.

• Journal of the Korea Institute of Military Science and Technology
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• v.20 no.5
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• pp.673-680
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• 2017

In the proposed paper, we designed low noise frequency synthesizer with compact size for Multi-Band. The proposed frequency synthesizer consists of fundamental frequency band(2 GHz) and harmonic frequency band(4 GHz). To improve the phase noise and spurious level of frequency synthesizer, we analyze how the configuration of frequency synthesizer affect the phase noise and design the multi-band's structure. The implemented frequency synthesizer reduce both the phase noise and spurious level. The phase noise is -92.17 dBc/Hz at 1 kHz frequency offset in 2 GHz and -90.50 dBc/Hz at 1 kHz frequency offset in 4 GHz. All spurious signals including fundamental frequency are suppressed at least 20 dBc than the second harmonic frequency.

• Journal of Satellite, Information and Communications
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• v.6 no.1
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• pp.45-49
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• 2011

In this paper, we present the high resolution and low phase noise frequency synthesizer for satellite terminal. To improve the phase noise of frequency synthesizer, we analyze how the configuration of frequency synthesizer affect the phase noise. The implemented frequency synthesizer reduce the phase noise and show the high resolution. The output power of this frequency synthesizer is over -2dBm in 950~1450MHz and the phase noise of the -101dBc/Hz at 10kHz frequency offset.