• Title/Summary/Keyword: low bandwidth

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Trace-Back Viterbi Decoder with Sequential State Transition Control (순서적 역방향 상태천이 제어에 의한 역추적 비터비 디코더)

  • 정차근
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.40 no.11
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    • pp.51-62
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    • 2003
  • This paper presents a novel survivor memeory management and decoding techniques with sequential backward state transition control in the trace back Viterbi decoder. The Viterbi algorithm is an maximum likelihood decoding scheme to estimate the likelihood of encoder state for channel error detection and correction. This scheme is applied to a broad range of digital communication such as intersymbol interference removing and channel equalization. In order to achieve the area-efficiency VLSI chip design with high throughput in the Viterbi decoder in which recursive operation is implied, more research is required to obtain a simple systematic parallel ACS architecture and surviver memory management. As a method of solution to the problem, this paper addresses a progressive decoding algorithm with sequential backward state transition control in the trace back Viterbi decoder. Compared to the conventional trace back decoding techniques, the required total memory can be greatly reduced in the proposed method. Furthermore, the proposed method can be implemented with a simple pipelined structure with systolic array type architecture. The implementation of the peripheral logic circuit for the control of memory access is not required, and memory access bandwidth can be reduced Therefore, the proposed method has characteristics of high area-efficiency and low power consumption with high throughput. Finally, the examples of decoding results for the received data with channel noise and application result are provided to evaluate the efficiency of the proposed method.

A Link Protection Scheme with a Backup Link Spanning Tree for Provider Backbone Bridged Networks and Implementation (프로바이더 백본 브리지 망을 위한 백업링크 스패닝트리 기반 링크장애 복구기능과 구현)

  • Nam, Wie-Jung;Lee, Hyun-Joo;Yoon, Chong-Ho;Hong, Won-Taek;Moon, Jeong-Hoon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.1
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    • pp.58-68
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    • 2010
  • In this paper, we propose an efficient link protection switching scheme for provider backbone bridge systems with a spanning tree for backup links exclusively, and evaluate its performance. The proposed scheme offers guaranteed QoS flows even when a link fault occurrs in the primary link by flooding the flows over the profiled spanning tree. The flooding mechanism over the spanning tree can also provide low latency and remove the loopback flows. We also derive the efficiency of bandwidth usage for the normal flows and the number of lost frames during the link restoration. For evaluating its feasibility, we implement a prototype of PBB-TE systems based on the Linux bridge codes, which can support both link protection switching capability with CCM and MAC-in-MAC encapsulation. A related protocol analyzer is also developed. One can see that the proposed scheme and the prototype can be useful for developing carrier class Ethernet systems based on PBB-TE.

Design of an 1.8V 6-bit 1GS/s 60mW CMOS A/D Converter Using Folding-Interpolation Technique (Folding-Interpolation 기법을 이용한 1.8V 6-bit 1GS/s 60mW 0.27$mm^2$ CMOS A/D 변환기의 설계)

  • Jung, Min-Ho;Moon, Jun-Ho;Hwang, Sang-Hoon;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.11
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    • pp.74-81
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    • 2007
  • In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit 1GSPS at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. To reduce the power consumption, a folder reduction technique to decrease the number of folding blocks (NFB) by half of the conventional ones is proposed. further, a novel layout technique is introduced for compact area. With the clock speed of 1GSPS, the ADC achieves an effective resolution bandwidth (ERBW) of 500MHz, while consuming only 60mW of power. The measured INL and DNL were within $\pm$0.5 LSB, $\pm$0.7 LSB, respectively. The measured SNR was 34.1dB, when the Fin=100MHz at Fs=300MHz. The active chip occupies an area of 0.27$mm^2$ in 0.18um CMOS technology.

Design of a Band-Stop Filter for UWB Application (UWB용 대역 저지 필터 설계)

  • Roh Yang-Woon;Hong Seok-Jin;Chung Kyung-Ho;Jung Ji-Hak;Choi Jae-Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.2 s.105
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    • pp.89-94
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    • 2006
  • A compact microstrip band-selective filter for ultra-wideband(UWB) radio system is proposed. The filter combines the traditional short-circuited stub highpass filter and coupled resonator band-stop filter on both sides of the mitered 50-ohm microstrip line. To realize the pseudo-highpass filtering characteristic over UWB frequency band(3.1 GHz to 10.6 GHz), a distributed highpass filter scheme is adopted. Three coupled resonators are utilized to obtain the band stop function at the desired frequency band. By meandering the coupled resonators, there is $29\;\%$ size reduction in footprint compared to the traditional band-stop filter using L-shaped resonators. The measured results show that the filter has a wide passband of $146.7\;\%$(2.1 GHz to 10.15 GHz) with low insertion loss and the stop band of $10.04\;\%$(5.2 GHz to 5.75 GHz) for 3-dB bandwidth. The measured group delay is less than 0.7 ns within the passband except the rejection band.

Analysis and Design of High Efficiency Feedforward Amplifier Using Distributed Element Negative Group Delay Circuit (분산 소자 형태의 마이너스 군지연 회로를 이용한 고효율 피드포워드 증폭기의 분석 및 설계)

  • Choi, Heung-Jae;Kim, Young-Gyu;Shim, Sung-Un;Jeong, Yong-Chae;Kim, Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.681-689
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    • 2010
  • We will demonstrate a novel topology for the feedforward amplifier. This amplifier does not use a delay element thus providing an efficiency enhancement and a size reduction by employing a distributed element negative group delay circuit. The insertion loss of the delay element in the conventional feedforward amplifier seriously degrades the efficiency. Usually, a high power co-axial cable or a delay line filter is utilized for a low loss, but the insertion loss, cost and size of the delay element still acts as a bottleneck. The proposed negative group delay circuit removes the necessity of the delay element required for a broadband signal suppression loop. With the fabricated 2-stage distributed element negative group delay circuit with -9 ns of total group delay, a 0.2 dB of insertion loss, and a 30 MHz of bandwidth for a wideband code division multiple access downlink band, the feedforward amplifier with the proposed topology experimentally achieved a 19.4 % power added efficiency and a -53.2 dBc adjacent channel leakage ratio with a 44 dBm average output power.

A Study on the Small Loop Antenna with a Parasitic Loop Structure for Multiband Mobile Phone Application (기생 루프 구조를 이용한 휴대 단말기용 다중 대역 초소형 루프 안테나에 관한 연구)

  • Lee, Sang-Heun;Kim, Ki-Joon;Jung, Jong-Ho;Yoon, Young-Joong;Kim, Byoung-Nam
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.706-713
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    • 2010
  • In this paper, the small loop antenna with a parasitic loop structure for penta-band mobile phone application is proposed. This antenna is composed of a feed monopole, a radiating loop antenna with a parasitic loop structure and an additional radiating element. The antenna is printed on the very thin flexible substrate to mount on the dielectric carrier with a volume of 40 mm$\times$11 mm$\times$3 mm. The bandwidth of the proposed antenna is 402 MHz(773~1,175 MHz) for low band and 583 MHz(1,622~2,205 MHz) for high band. As a result, the proposed antenna covers the five bands of GSM850, GSM900, DCS1800, PCS1,900 and WCDMA for a 3:1 VSWR. Moreover, the radiation pattern, gain and efficiency are appropriate for mobile handset. Therefore, this antenna is suitable for small sized multi-band mobile handset applications.

The Evaluation of Imaging Quality Depending the Shift of the Central Axis in FOCUS DWI Investigation (Focus DWI 검사에서 중심축 이동에 따른 화질 평가)

  • Kim, Younghwa;Jeong, Moontaeg;Choi, Namgil
    • Journal of the Korean Society of Radiology
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    • v.12 no.5
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    • pp.631-636
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    • 2018
  • The problem that the existing the magnetic resonance image (MRI) was prone to have not only long readout duration and low bandwidth in the phase-encode direction, but also geometric distortion was pointed out. The purpose of this study is to identify the usefulness of FOCUS-DWI through comparing FOCUS-DWI with the Conventional-DWI on a degree of uniformity and artifacts caused by the distance change in the central axis within the magnetic field. In terms of artifacts, there happened irregular striped artifacts in the Conventional-DWI technique, which in particular, more often arose in the central axis. Also, the overlap of imaging drastically increased. By contrast, there were no irregular striped artifacts in the FOCUS-DWI technique. In conclusion, it was found that the FOCUS-DWI technique was superior to the Conventional-DWI technique in terms of artifacts, the overlap of imaging, and a degree of uniformity. In addition, there was no difference of the change in distance from the central axis between the FOCUS-DWI technique and the Conventional-DWI technique. Thus, it is considered the FOCUS-DWI technique having less imaging distortion and high image quality will be highly clinically used.

MTJ Performance Analysis of Hybrid DS/SFH Spread-Spectrum System using MSK or QPSK Modulation over Rayleigh Fading Channel (레이리 페이딩 채널상에서 MSK 혹은 QPSK 변조 방식의 하이브리드 DS/SFH 확산 스펙트럼 시스템의 다중톤 재밍 성능 분석)

  • Ryu, Heung-Gyoon;Chung, Byung-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.5
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    • pp.492-499
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    • 2002
  • Performance analysis and comparison of the hybrid DS-SFH spread-spectrum (SS) system using coherent MSK and QPSK modulation techniques over Rayleigh fading channel are considered in the presence of MTJ(multi-tone jamming). To analyze the BER performance of the hybrid systems with or without the Rake receiver, signal-to-noise plus interference ratio is derived as a function of the average signal-to-noise ratio, the jammer-to-signal ratio and other system parameters. Numerical results show that the performance difference between the two modulation schemes, MSK and QPSK, is negligible for low JSR, while it becomes significant with the increase of JSR. In multi-path Rayleigh fading channel without Rake receiver, the performances of the two modulation schemes are slightly improved as the DS spreading gain is increased when the total SS bandwidth is fixed. In particular, there is an optimum DS spreading gain for large JSR, in which a minimum BER is achieved, while only DS spreading gives the best performance for small JSR. For hybrid systems with Rake receiver, it is shown that the hybrid system of the MSK modulation scheme provides better anti-jamming performance and larger performance improvement with the increase of multi-path resolution capability of Rake receiver than that of QPSK modulation for all conditions.

A Technique Getting Fast Masks Using Rough Division in Dynamic ROI Coding of JPEG2000 (JPEG2000의 동적 ROI 코딩에서 개략적인 분할을 이용한 빠른 마스크 생성 기법)

  • Park, Jae-Heung;Lee, Jum-Sook;Seo, Yeong-Geon;Hong, Do-Soon;Kim, Hyun-Joo
    • The KIPS Transactions:PartB
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    • v.17B no.6
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    • pp.421-428
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    • 2010
  • It takes a long time for the users to view a whole image from the image server under the low-bandwidth internet environments or in case of a big sized image. In this case, as there needs a technique that preferentially transfers a part of image, JPEG2000 offers a ROI(Region-of-Interest) coding. In ROI coding, the users see the thumbnail of image from the server and specifies some regions that they want to see first. And then if an information about the regions are informed to the server, the server preferentially transfers the regions of the image. The existing methods requested a huge time to compute the mask information, but this thesis approximately computes the regions and reduces the creating time of the ROI masks. If each code block is a mixed block which ROI and background are mixed, the proper boundary points should be acquired. Searching the edges of the block, getting the two points on the edge, to get the boundary point inside the code block, the method searches a mid point between the two edge points. The proposed method doesn't have a big difference compared to the existing methods in quality, but the processing time is more speedy than the ones.

An 1.2V 10b 500MS/s Single-Channel Folding CMOS ADC (1.2V 10b 500MS/s 단일채널 폴딩 CMOS A/D 변환기)

  • Moon, Jun-Ho;Park, Sung-Hyun;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.1
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    • pp.14-21
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    • 2011
  • A 10b 500MS/s $0.13{\mu}m$ CMOS ADC is proposed for 4G wireless communication systems such as a LTE-Advanced and SDR The ADC employs a calibration-free single-channel folding architecture for low power consumption and high speed conversion rate. In order to overcome the disadvantage of high folding rate, at the fine 7b ADC, a cascaded folding-interpolating technique is proposed. Further, a folding amplifier with the folded cascode output stage is also discussed in the block of folding bus, to improve the bandwidth limitation and voltage gain by parasitic capacitances. The chip has been fabricated with $0.13{\mu}m$ 1P6M CMOS technology, the effective chip area is $1.5mm^2$. The measured results of INL and DNL are within 2.95LSB and l.24LSB at 10b resolution, respectively. The SNDR is 54.8dB and SFDR is 63.4dBc when the input frequency is 9.27MHz at sampling frequency of 500MHz. The ADC consumes 150mW($300{\mu}W/MS/s$) including peripheral circuits at 500MS/s and 1.2V(1.5V) power supply.