• Journal of the Korean Society of Manufacturing Process Engineers
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• v.20 no.2
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• pp.38-44
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• 2021

To cater to the transition from single-color to multicolor/multi-material printing, this paper proposes a cartridge-replacing type multi-nozzle Fused Depositon Modeling(FDM) three-dimensional (3D) printer. In the test printing run, tool change failure/wobble/layer shift occurred. It was confirmed that improper support was the cause of this tool change failure. As a solution, spline and electromagnetic cartridges were designed. Wobble was caused by machine vibration and the motor stepping out. To minimize wobble, an additional Z-axis was installed, and the four-point bed leveling method was used instead of the three-point bed leveling method. The occurrence of layer shift was ascribed to the eccentricity of the Z-axis lead screw. Therefore, slit coupler was replaced with an Oldham type. In addition to the mechanical supplementation, the control environment was integrated to prevent accidents and signal errors due to wire connections. Before the final test printing run, a rectifier circuit was added to the motor to secure precise control stability. The final test printing run confirmed that the wobble/layer shift phenomenon was minimized, and the maximum error between layers was reduced to 0.05.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.5
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• pp.351-355
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• 2001

Via for achieving reliable fabrication of MCM(Multichip Module) substrate was formed on photosensitive BCB layer. The MCM substrate consists of photosensitive BCB(Benzocyclobutene) interlayer dielectric and copper conductors. In order to form the vias in the photosensitive BCB layer, the process of forming the BCB layer and its via forming plasma etch using C$_2$F$\_$6//O$_2$ gas were evaluated. The thickness of the BCB layer after hard bake was shrunk down to 40% of the original. The resolution of vias formed on the BCB was 15㎛ and the slope after develop was 85 degree. AES analysis was done on two vias, one is etched in C$_2$F$\_$6/O$_2$ gas and the other isnot etched. On the via etched in C$_2$F$\_$6//O$_2$, native C was detected and the amount of native C was reduced after Ar sputter. On the via not etched in C$_2$F$\_$6//O$_2$, organic C was detected. As a result of AES, BCB residue was not removed by Ar sputter, so plasma etch is necessary for achieving reliable vias.

• Korean Journal of Materials Research
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• v.13 no.2
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• pp.101-105
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• 2003

In this study, we have investigated the availability of the electroless Ni-B plating for a diffusion barrier of the bus electrode. The Ni-B layer of 1$\beta$: thick was electroless deposited on the electroplated Cu bus electrode for AC plasma display. The layer was to encapsulate Cu bus electrode to prevent from its oxidation and to serve as a diffusion barrier against Cu contamination of the transparent dielectric layer in AC plasma display. The microstructure of the as-plated barrier layer was made of an amorphous phase and the structure was converted to crystalline at about 30$0^{\circ}C$. The concentration of boron was about 5∼6 wt.% in the electroless Ni-B deposit regardless of DMAB concentration. The electroless Ni-B deposit was coated on the surface of the electroplated Cu bus electrode uniformly. And the electroless Ni-B plating was found to be an appropriate process to form the diffusion barrier.

• Journal of the Korean Ceramic Society
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• v.41 no.3
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• pp.259-265
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• 2004

The microstructure of nano-sized hydroxyapatite (HAp) powders coating layer on ZrO$_2$ substrate was investigated, which was formed by plasma spray process. The nano-sized HAp powders were successfully synthesized by precipitation of Ca(NO$_3$)$_2$$.$4H$_2$O and (NH$_4$)$_2$HPO$_4$ solution. The HAp coating layer with thickness of 150∼250 $\mu\textrm{m}$ was free from the cracks at interfaces between the coating and ZrO$_2$ substrate. In the plasma sprayed HAp coating layer, the undesirable phases were not found, while in the HAp coating layer heat-treated at 800$^{\circ}C$, TTCP, and ${\beta}$-TCP phase were detected as well as HAp phase. However, at 900$^{\circ}C$, they were completely disappeared. At 1100$^{\circ}C$, XRD analysis revealed that the coating layer was composed of the highly crystallized HAp.

• Journal of Powder Materials
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• v.22 no.6
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• pp.391-395
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• 2015

We report on the successful fabrication of ZnO nanorod (NR)/polystyrene (PS) nanosphere hybrid nanostructure by combining drop coating and hydrothermal methods. Especially, by adopting an atomic layer deposition method for seed layer formation, very uniform ZnO NR structure is grown on the complicated PS surfaces. By using zinc nitrate hexahydrate $[Zn(NO_3)_2{\cdot}6H_2O]$ and hexamine $[(CH_2)_6N_4]$ as sources for Zn and O in hydrothermal process, hexagonal shaped single crystal ZnO NRs are synthesized without dissolution of PS in hydrothermal solution. X-ray diffraction results show that the ZnO NRs are grown along c-axis with single crystalline structure and there is no trace of impurities or unintentionally formed intermetallic compounds. Photoluminescence spectrum measured at room temperature for the ZnO NRs on flat Si and PS show typical two emission bands, which are corresponding to the band-edge and deep level emissions in ZnO crystal. Based on these structural and optical investigations, we confirm that the ZnO NRs can be grown well even on the complicated PS surface morphology to form the chestnut-shaped hybrid nanostructures for the energy generation and storage applications.

• Journal of Sensor Science and Technology
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• v.17 no.1
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• pp.35-40
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• 2008

Low power bridge type micro gas sensors were fabricated by micro machining technology with TMAH (Tetra Methyl Ammonium Hydroxide) solution. The sensing devices with different heater materials such as metal and poly-silicon were obtained using CMOS (Complementary Metal Oxide Semiconductor) compatible process. The tellurium films as a sensing layer were deposited on the micro machined substrate using shadow silicon mask. The low power micro gas sensors showed high sensitivity to NO with high speed. The pure tellurium film used micro gas sensor showed good sensitivity than transition metal (Pt, Ti) used tellurium film.

• Nuclear Engineering and Technology
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• v.45 no.7
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• pp.827-838
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• 2013

Interaction layer growth between U-Mo alloy fuel particles and Al in a dispersion fuel is a concern due to the volume expansion and other unfavorable irradiation behavior of the interaction product. To reduce interaction layer (IL) growth, a small amount of Si is added to the Al. As a result, IL growth is affected by the Si content in the Al matrix. In order to predict IL growth during fabrication and irradiation, empirical models were developed. For IL growth prediction during fabrication and any follow-on heating process before irradiation, out-of-pile heating test data were used to develop kinetic correlations. Two out-of-pile correlations, one for the pure Al matrix and the other for the Al matrix with Si addition, respectively, were developed, which are Arrhenius equations that include temperature and time. For IL growth predictions during irradiation, the out-of-pile correlations were modified to include a fission-rate term to consider fission enhanced diffusion, and multiplication factors to incorporate the Si addition effect and the effect of the Mo content. The in-pile correlation is applicable for a pure Al matrix and an Al matrix with the Si content up to 8 wt%, for fuel temperatures up to $200^{\circ}C$, and for Mo content in the range of 6 - 10wt%. In order to cover these ranges, in-pile data were included in modeling from various tests, such as the US RERTR-4, -5, -6, -7 and -9 tests and Korea's KOMO-4 test, that were designed to systematically examine the effects of the fission rate, temperature, Si content in Al matrix, and Mo content in U-Mo particles. A model converting the IL thickness to the IL volume fraction in the meat was also developed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.4
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• pp.273-279
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• 2002

This paper presents a fabrication technology for the integration of single crystal Si microstructures with on-chip circuitry. It is a dissolved wafer technique that combines an electro-chemical etch-stop for the protection of circuitry with an impurity-based etch-stop for the microstructures, both of which are defined in an n-epi layer on a p-type Si wafer. A CMOS op. amp. has been integrated with $p^{++}$ Si accelerometers using this process. It has a gain of 68 dB and an output swing within 0.2 V of its power supplies, unaffected by the wafer dissolution. The accelerometers have $3{\;}\mu\textrm{m}$ thick suspension beams and $15{\;}\mu\textrm{m}$ thick proof masses. The structural and electrical integrity of the fabricated devices demonstrates the success of the fabrication process. A variety of lead transfer methods are shown, and process details are discussed.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.27 no.9
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• pp.1517-1523
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• 2003

Deep X-ray lithography (DXRL), a fabrication method for the production of microstructures with a high aspect ratio, plays an important role in the subsequent electroplanting process. However, secondary radiation is generated during X-ray exposure and damages the resist adhesion to the metal layer. To solve adhesion problems, we modified the conventional DXRL process, changing the sequence of polymer adhesion in DXRL process. With optimized X-ray exposure and development conditions based on a calculated and modified X-ray power spectrum, we fabricated various polymer microstructures and achieved a maximum aspect ratio of 40.

• Journal of Sensor Science and Technology
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• v.22 no.2
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• pp.130-135
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• 2013

This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{\mu}m$ in diameter and $400{\mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.