• Title/Summary/Keyword: interleaving method

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A Novel Channel Estimation Method Using Pilot Channels for Frequency-Interleaved MC-CDMA Systems (주파수 인터리빙된 MC-CDMA 시스템에서 파일럿 채널을 이용한 새로운 채널 추정 기법)

  • Cho Young-bo;Lee Jae-Gu;Oh seong-Mok;Kang Chang-eon;Hong Dae-sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.12C
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    • pp.1186-1192
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    • 2005
  • In this paper, we propose a novel channel estimation method based on pilot channel in a frequency interleaved multicarrier code division multiple access (MC-CDMA). Using the chip interleaving (CI) technique in the frequency domain make it possible to achieve higher frequency diversity gain than the system with conventional symbol interleaving. However, in CI-MC-CDMA systems, a pilot channel-based channel estimation (PCCE) cannot be applied because the orthogonality between pilot symbols and the data symbol is not maintained. The proposed method alters the system structure in order to maintain orthogonality between data and pilot channels over two consecutive subcarriers. Therefore, it can obtain accurate channel state information (CSI) in CI-MC-CDMA.

Efficient Exponentiation in Extensions of Finite Fields without Fast Frobenius Mappings

  • Nogami, Yasuyuki;Kato, Hidehiro;Nekado, Kenta;Morikawa, Yoshitaka
    • ETRI Journal
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    • v.30 no.6
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    • pp.818-825
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    • 2008
  • This paper proposes an exponentiation method with Frobenius mappings. The main target is an exponentiation in an extension field. This idea can be applied for scalar multiplication of a rational point of an elliptic curve defined over an extension field. The proposed method is closely related to so-called interleaving exponentiation. Unlike interleaving exponentiation methods, it can carry out several exponentiations of the same base at once. This happens in some pairing-based applications. The efficiency of using Frobenius mappings for exponentiation in an extension field was well demonstrated by Avanzi and Mihailescu. Their exponentiation method efficiently decreases the number of multiplications by inversely using many Frobenius mappings. Compared to their method, although the number of multiplications needed for the proposed method increases about 20%, the number of Frobenius mappings becomes small. The proposed method is efficient for cases in which Frobenius mapping cannot be carried out quickly.

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An LBX Interleaving Watermarking Method with Robustness against Image Removing Attack (영상제거 공격에 강인한 LBX 인터리빙 워터마킹 방법)

  • 고성식;김정화
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.6
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    • pp.1-7
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    • 2004
  • The rapid growth of digital media and communication networks has created an urgent need for self-contained data identification methods to create adequate intellectual property right(IPR) protection technology. In this paper we propose a new watermarking method that could embed the gray-scale watermark logo in low frequency coefficients of discrete wavelet transform(DWT) domain as the marking space by using our Linear Bit-eXpansion(LBX) interleaving of gray-scale watermark, to use lots of watermark information without distortion of watermarked image quality and particularly to be robust against attack which could remove a part of image. Experimental results demonstrated the high robustness in particular against attacks such as image cropping and rotation which could remove a part of image.

A Design of Parallel Turbo Decoder based on Double Flow Method Using Even-Odd Cross Mapping (짝·홀 교차 사상을 이용한 Double Flow 기법 기반 병렬 터보 복호기 설계)

  • Jwa, Yu-Cheol;Rim, Chong-Suck
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.7
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    • pp.36-46
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    • 2017
  • The turbo code, an error correction code, needs a long decoding time since the same decoding process must be repeated several times in order to obtain a good BER performance. Thus, parallel processing may be used to reduce the decoding time, in which case there may be a memory contention that requires additional buffers. The QPP interleaving has been proposed to avoid such case, but there is still a possibility of memory contention when a decoder is constructed using the so-called double flow technique. In this paper, we propose an even-odd cross mapping technique to avoid memory conflicts even in decoding using the double-flow technique. This method uses the address generation characteristic of the QPP interleaving and can be used to implement the interleaving circuit between the decoding blocks and the LLR memory blocks. When the decoder implemented by applying the double flow and the proposed methods is compared with the decoder by the conventional MDF techniques, the decoding time is reduced by up to 32% with the total area increase by 8%.

A Novel Paralleling Method of Converters for Reduction of Hippie in Output Voltage (컨버터의 출력전압 리플 저감을 위한 새로운 병렬운전 방법에 대한 연구)

  • Park, Sung-Woo;Park, Hee-Sung;Jang, Jin-Beak;Jang, Sung-Soo;Kim, Jong-Duck
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.11a
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    • pp.237-240
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    • 2004
  • For the paralleled operation of DC/DC converters, the current sharing between each modules is the most important for the reliability of the power system. Interleaving method is commonly used with many paralleling schemes for the reduction of the ripple in the output voltage of paralleled converters and there are many commercial IC for interleaving application appliable. But for all of them, it is impossible to detect the number of module in operating and then change the phase of them automatically. In this paper, a novel paralleling method is proposed for the converter parallel operation, which detects the number of modules in active and sets the phases of PWM signals applied to each modules autonomously. This can greatly improve the output voltage ripple and reliability of the system. The expandibility of modular number can be done very easily by just adding several parts.

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A Study on Video Data Protection Method based on MPEG using Dynamic Shuffling (동적 셔플링을 이용한 MPEG기반의 동영상 암호화 방법에 관한 연구)

  • Lee, Ji-Bum;Lee, Kyoung-Hak;Ko, Hyung-Hwa
    • Journal of Korea Multimedia Society
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    • v.10 no.1
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    • pp.58-65
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    • 2007
  • This dissertation proposes digital video protection algorithm lot moving image based on MPEG. Shuffling-based encryption algorithms using a fixed random shuffling table are quite simple and effective but vulnerable to the chosen plaintext attack. To overcome this problem, it is necessary to change the key used for generation of the shuffling table. However, this may pose a significant burden on the security key management system. A better approach is to generate the shuffling table based on the local feature of an image. In order to withstand the chosen plaintext attack, at first, we propose a interleaving algorithm that is adaptive to the local feature of an image. Secondly, using the multiple shuffling method which is combined interleaving with existing random shuffling method, we encrypted the DPCM processed 8*8 blocks. Experimental results showed that the proposed algorithm needs only 10% time of SEED encryption algorithm and moreover there is no overhead bit. In video sequence encryption, multiple random shuffling algorithms are used to encrypt the DC and AC coefficients of intra frame, and motion vector encryption and macroblock shuffling are used to encrypt the intra-coded macroblock in predicted frame.

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Multi-functional Fighter Radar Scheduling Method for Interleaved Mode Operation of Airborne and Ground Target (전투기탑재 다기능 레이다의 공대공 및 공대지 동시 운용 모드를 위한 스케줄링 기법)

  • Kim, Do-Un;Lee, Woo-Cheol;Choi, Han-Lim;Park, Joontae;Park, Junehyune;Seo, JeongJik
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.49 no.7
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    • pp.581-588
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    • 2021
  • This paper deals with a beam scheduling method in fighter interleaving mode. Not only the priority of tasks but also operational requirements that air-to-ground and air-to-air search tasks should be executed alternatively are established to maximize high-quality of situational awareness. We propose a real-time heuristic beam scheduling method that is advanced from WMDD to satisfies the requirements. The proposed scheduling method is implemented in a simulation environment resembling the task processing mechanism and measurement model of a radar. Performance improvement in terms of task delay time is observed.

A Multi-View Images Interleaving for Slanted Parallax Barrier based Display Device (사선형 시차 장벽 기반 입체 디스플레이 장치를 위한 다중 시점 영상 생성)

  • Jung, Kyung-Boo;Park, Jong-Il;Choi, Byung-Uk
    • Journal of Broadcast Engineering
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    • v.17 no.3
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    • pp.491-502
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    • 2012
  • Flat panel-based parallax barrier or lenticular based 3D display devices that have been developed recently are designed to feel depth. In order to see a three-dimensional(3D) image by the display device, a multi-view image displayed on the flat panel must be regenerated from images of multi-views using a subsampling method. Previous subsampling methods are focused on reducing crosstalk. In this paper, we focus on a misalignment that is occurred on manufacture process of slanted parallax barrier based autostereoscopic display device. Therefore, we propose a interleaving method that considers tilt of slanted parallax barrier, aperture size, and distance between an autostereoscopic display device and a viewer to see a 3D image regardless of a viewer position.

Analysis of Shrinking Generator Using Phase Shifts (위상이동차를 이용한 수축 생성기의 분석)

  • Hwang, Yoon-Hee;Cho, Sung-Jin;Choi, Un-Sook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.11
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    • pp.2507-2513
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    • 2010
  • In this paper, we show that the shrinking generator with two LFSR whose characteristic polynomials are primitive is an interleaving generator and analyze phase shifts in shrunken sequence. Also for a given intercepted sequence of shrunken sequence, we propose. the method of reconstructing some deterministic bits of the shrunken sequence using phase shifts.

A Study of Interleaved AC/DC Converter to Improved Power Factor and Current Ripple (역률과 전류 리플을 개선한 인터리브 AC/DC 컨버터에 관한 연구)

  • Seo, Sang-Hwa;Kim, Yong;Kwon, Soon-Do;Bae, Jin-Yong;Eom, Tae-Min
    • Proceedings of the KIEE Conference
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    • 2009.04b
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    • pp.152-155
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    • 2009
  • In high power application, PFC(Power Factor Correction) pre-regulators are generally required. PFC pre-regulators could achieve unity power factor, reduce line input current harmonics and utilize full line power. Interleaving PFC converters could reduce input ripple current, output capacitor ripple current and inductor size. With this closed loop interleaving method, both two phase converters are working at the boundary between continuous and discontinuous mode and accurate 180 degree phase shift is achieved. Implementation of this strategy could be easily integrated to the control chip. Finally, experimental results of a two-phase interleaved boost PFC are presented to verify the discussed features.

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