Browse > Article
http://dx.doi.org/10.5573/ieie.2017.54.7.36

A Design of Parallel Turbo Decoder based on Double Flow Method Using Even-Odd Cross Mapping  

Jwa, Yu-Cheol (Dept. of CS&E, Sogang University)
Rim, Chong-Suck (Dept. of CS&E, Sogang University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.54, no.7, 2017 , pp. 36-46 More about this Journal
Abstract
The turbo code, an error correction code, needs a long decoding time since the same decoding process must be repeated several times in order to obtain a good BER performance. Thus, parallel processing may be used to reduce the decoding time, in which case there may be a memory contention that requires additional buffers. The QPP interleaving has been proposed to avoid such case, but there is still a possibility of memory contention when a decoder is constructed using the so-called double flow technique. In this paper, we propose an even-odd cross mapping technique to avoid memory conflicts even in decoding using the double-flow technique. This method uses the address generation characteristic of the QPP interleaving and can be used to implement the interleaving circuit between the decoding blocks and the LLR memory blocks. When the decoder implemented by applying the double flow and the proposed methods is compared with the decoder by the conventional MDF techniques, the decoding time is reduced by up to 32% with the total area increase by 8%.
Keywords
Turbo decoder; QPP interleaving; Memory contention; Even-odd cross-mapping; MAP;
Citations & Related Records
연도 인용수 순위
  • Reference
1 C. E. Shannon, "A mathematical theory of communication," Bell System Technical Journal, vol. 27, pp. 379-423, Jul. 1948.   DOI
2 Jae-Ming Hsu and Chin-Liang Wang, "A Parallel Decoding Scheme for Turbo Codes," IEEE Inl. Symp. on Circuits and Systenrs, vol. 4, pp. 445-448, June 1998.
3 C. Schurgers, F. Catthoor, M. Engels, "Optimized MAP Turbo Decoder", SiPS 2000, Oct. 2000, pp. 245-254.
4 O. Y. Takeshita, "On Maximum Contention-Free Interleavers and Permutation Polynomials over Integer Rings", IEEE Transactions on Information Theory, Vol. 52, No. 3, Mar. 2005, pp. 1249-1253.   DOI
5 Jae-Hun Chung, Heemin Park, Chong S., "Design of a Contention-Free Parallel Double-Flow MAP Decoder", IEEJ, Volume 10, 2015, pp.70-74.
6 "Technical Specification Group Radio Access Network; Multiplexing and channel coding (FDD)(Release 6)", 3GPP TS 25.212 V6.7.0, 2005-12.
7 S. S. Pietrobon, A. S. Barbulescu, "A Simplification of the Modified Bahl Decoding Algorithm for Systematic Convolutional Codes", International Symposium on Information Theory and its Applications, pp. 1073-1077, Sydney, Australia, Nov. 1994.
8 Ericsson, "Quadratic Permutation Polynomial Interleaver Designs for LTE Turbo Coding", 3GPP TSG-RAN WG1 #47 bis, R1-070462.
9 Z. He, P. Fortier, S. Roy, "Highly-Parallel Decoding Architectures for Convolutional Turbo Codes", IEEE Transactions on Very Large Scale Integration(VLSI) Systems, Vol. 14, No. 10, pp. 1147-1151, Oct. 2006.   DOI
10 H. Bajwa, An area-efficient, high-performance, low-power multi-port cache memory architecture, Ph.D. Thesis, Department of Electrical Engineering, City University of New York., pp. 7-16, 2007.
11 J.-H. Chung and C. S. Rim, Design of Contention Free Parallel MAP Decode Module, J. of IEEK, Vol. 48(SD), No. 1, pp. 39-49, 2011.