• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.6C
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• pp.609-614
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• 2003

In this paper, a new filter structure to improve frequency response characteristics in CIC(Cascaded Integrator-Comb) decimation filters is proposed. Conventional filters improve passband characteristics, but they make worse aliasing band characteristics. In this paper, we propose a new filter which is called IFOP(Interpolated Fourth-Order Polynomials). By using this proposed filter, passband droop and aliasing band attenuation are simultaneously improved. Since proposed filter needs only one multiplication, computation is not much. And overall linear phase characteristics are maintained since the proposed filter is also linear phase. Finally, implementation cost of the proposed filter is compared with those of conventional filters.

• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.32-36
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• 2004

In order to achieve high performance vector control, it is essential to measure accurate ac current. The errors generated from current path are inevitable, and they could be divided into two categories: offset error and scaling error. The current data including these errors cause periodic speed ripples which are one and two times of stator electrical frequency respectively. Since these undesirable ripples bring about bad influences to motor driving system, a compensation algorithm must be needed in the control algorithm of the motor drive. In this paper, a new compensation algorithm is proposed. The signal of the integrator output of the d-axis current regulator is chosen and processed to compensate the current measurement errors. The compensation of the current measurement errors is easily implemented to smooth the signal of the integrator output of the d-axis current regulator by subtracting the DC offset value or rescaling the gain of the hall sensor. Therefore, the proposed algorithm has several features: the robustness of the variation of the mechanical parameters, the application of the steady and transient state, the easy implementation, and less computation time.

• Nuclear Engineering and Technology
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• v.52 no.11
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• pp.2535-2542
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• 2020

To understand the fundamental parameters of Alvand tokamak, A Rogowski coil with an active integrator was designed and constructed. Considering the characteristics of the Alvand tokamak, the structural and electrical parameters affecting the sensor function, were designed. Calibration was performed directly in the presence of plasma. The sensor has a high resistance against interference of external magnetic fields. Plasma current was measured in various experiments. Based on the plasma current profile and loop voltage signal, the time evolution of plasma discharge was investigated and plasma behavior was analyzed. Alvand tokamak discharge was divided into several regions that represents different physical phenomena in the plasma. During the plasma discharge time, plasma had significant changes and its characteristic was not uniform. To understand the plasma behavior in each of the phases, the Rogowski sensor should have sufficient time resolution. The Rogowski sensor with a frequency up to 15 kHz was appropriate for this purpose.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.9
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• pp.768-776
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• 2000

A robust high-speed motion controller is proposed. The proposed controller consists of the proximate time optimal servomechai는 (PTOD) for high-speed motion, disturbance observer (DOB) for robustness, friction compensator, and saturation handling element, In the proposed controller, DOB basically provides the chance to apply PTOS to non-double integrator systems by drastically reducing disturbances as well as unwanted signals due to difference between real system and the double integrator model. But, in DOB-based systems, if control input is saturated due to control input PTOS and/or DOB, overall system stability cannot be guaranteed. To solve this problem, ribust stability, when the control input is saturated. Eventually, a simple saturation handling element is inserted to maintain internal stability of overall system. Also, we explain the our two saturation handling methods, Additional Saturation Element (ASE_ and Self Adjusting Saturation (SAS), are the equivalent solutions of the saturation problem to maintain internal stability. The stability and performance of the proposed controller are verified through numerical simulations and experiments using a precision linear motor system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.11
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• pp.68-76
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• 2014

This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.

• ETRI Journal
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• v.33 no.6
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• pp.897-903
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• 2011

A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.153-158
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• 2005

In this paper, a filter is proposed to compensate droop of the CIC filter for SDR. The proposed compensation filter has almost linear-phase characteristic, requires low operational complexity, and is cost-effective due to its second-order characteristic and lowest operational rate in the baseband.. Especially, it compensates droop in the passband with little performance degradation in the stopband. It is shown, by a design example and its performance analysis, that the proposed compensation method gives performance enhancement in communication systems. It is also shown that the proposed method is superior to conventional ones in view of memory usage and computational load.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1101-1107
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• 2017

In this paper, a robust and fast grid synchronization method of a three-phase power converter is proposed. The amplitude and phase information of grid voltages are essential for power converters to be properly connected into the utility. The phase-lock-loop in synchronous reference frame has been widely adopted for the three-phase converter system since it shows a satisfactory performance under balanced grid voltages. However, power converters often operate under abnormal grid conditions, i.e. unbalanced by grid faults and frequency variations, and thus a proper active and reactive power control cannot be guaranteed. The proposed method adopts a second order generalized integrator in synchronous reference frame to detect positive sequence components under unbalanced grid voltages. The proposed method has a fast and robust performance due to its higher gain and frequency adaptive capability. Simulation and experimental results show the verification of the proposed synchronization algorithm and the effectiveness to detect positive sequence voltage.

• Journal of Power Electronics
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• v.15 no.2
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• pp.419-430
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• 2015

Flux estimation is a significant foundation of high-performance control for DC-excited synchronous motor. For almost all flux estimators, such as the flux estimator based on phase locked loop (PLL), DC drift causes fluctuations in flux magnitude. Furthermore, significant dynamic error may be introduced at transient conditions. To overcome these problems, this paper proposes an improved flux estimator for the PLL-based algorithm. Filters based on the generalized integrator are used to avoid flux fluctuation problems caused by the DC drift at the back electromotive force. Programmable low-pass filters are employed to improve the dynamic performance of the flux estimator, and the cutoff frequency of the filter is determined by the dynamic factor. The algorithm is verified by a 960V/1.6MW industrial prototype. Simulation and experimental results show that the proposed estimator can estimate the flux more accurately than the PLL-based algorithm in a cycloconverter-fed DC-excited synchronous machine vector control system.

• Journal of Power Electronics
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• v.17 no.3
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• pp.798-810
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• 2017

This paper presents a combined system of a small-capacity inverter and multigroup delta-connected thyristor switched capacitors (TSCs). The system is referred to as a hybrid static compensator (HSC) and has the functions of dynamic reactive power compensation and harmonic suppression. In the proposed topology, the load reactive power is mainly compensated by the TSCs. Meanwhile the inverter is meant to cooperate with TSCs to achieve continuous reactive power compensation, and to filter the harmonics generated by nonlinear loads and the TSCs. First, the structure and mathematical model of the HSC are discussed Then the control method of the HSC is presented. An improved reduced order generalized integrator (ROGI)-based selective current control method is adopted in the inverter to achieve high-performance reactive and harmonic current compensation. Meanwhile, a switch control strategy is proposed to implement precise and fast switching of the TSCs and to avoid changing the time delay needed by the conventional switch strategy. Experiments are implemented on a 20 KVA HSC prototype and the obtained results verify the validity of the proposed HSC system.