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http://dx.doi.org/10.5207/JIEIE.2014.28.11.068

A Study on Current Ripple Reduction Due to Offset Error in SRF-PLL for Single-phase Grid-connected Inverters  

Hwang, Seon-Hwan (Dept. of Electrical Eng., Kyungnam Univ.)
Hwang, Young-Gi (Dept. of Electrical Eng., Kyungnam Univ.)
Kwon, Soon-Kurl (Dept. of Electrical Eng., Kyungnam Univ.)
Publication Information
Journal of the Korean Institute of Illuminating and Electrical Installation Engineers / v.28, no.11, 2014 , pp. 68-76 More about this Journal
Abstract
This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.
Keywords
Single-phase Grid-connected Inverter; Offset Error; Integrator Output; Root Mean Square;
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Times Cited By KSCI : 2  (Citation Analysis)
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