• Title/Summary/Keyword: high linearity

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In Vivo High Resolution NMR Imaging by Using Surface Gradient Coil (평면 경사자계 코일을 사용한 고분해능 NMR 생체 영상법에 관한 연구)

  • Yi, Jeong-Han;Oh, Woo-Jin;Cho, Zang-Hee
    • Proceedings of the KOSOMBE Conference
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    • v.1990 no.11
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    • pp.48-51
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    • 1990
  • A new in vivo high resolution imaging method which is performed with a newly developed three channel surface gradient coil (SGC) is described. The surface gradient coil can produce more than an order of magnitude stronger gradient fields with good linearity within a limited imaging region. To increase the signal to noise ratio (SNR), we have developed an RF coil integrated surface gradient coil set. In this paper, the geometrical structures and characteristics of the proposed surface gradient coil are discussed and experimentally obtained high resolution images ($50\;{\mu}m$ to $100\;{\mu}m$) of a water filled phantom and a human volunteer's knee using the new surface RF coil integrated SGC set are presented for the demonstration of the in vivo high resolution imaging capability of the new imaging method.

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High Performance CMOS Charge Pumps for Phase-locked Loop

  • Rahman, Labonnah Farzana;Ariffin, NurHazliza Bt;Reaz, Mamun Bin Ibne;Marufuzzaman, Mohammad
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.5
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    • pp.241-249
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    • 2015
  • Phase-locked-loops (PLL) have been employed in high-speed data transmission systems like wireless transceivers, disk read/write channels and high-speed interfaces. The majority of the researchers use a charge pump (CP) to obtain high performance from PLLs. This paper presents a review of various CMOS CP schemes that have been implemented for PLLs and the relationship between the CP parameters with PLL performance. The CP architecture is evaluated by its current matching, charge sharing, voltage output range, linearity and power consumption characteristics. This review shows that the CP has significant impact on the quality performance of CP PLLs.

An Architecture Design of a Multi-Stage 12-bit High-Speed Pipelined A/D Converter (다단 12-비트 고속 파이프라인 A/D 변환기의 구조 설계)

  • 임신일;이승훈
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.220-228
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    • 1995
  • An optimized 4-stage 12-bit pipelined CMOS analog-to-digital converter (ADC) architecture is proposed to obtain high linearity and high yield. The ADC based on a multiplying digital-to-analog converter (MDAC) selectively employs a binary-weighted-capacitor (BWC) array in the front-end stage and a unit-capacitor (UC) array in the back-end stages to improve integral nonlinearity (INL) and differential nonlinearity (DNL) simultaneously whil maintaining high yield. A digital-domain nonlinear error calibration technique is applied in the first stage of the ADC to improve its accuracy to 12-bit level. The largest DNL error in the mid-point code of the ADC is reduced by avoiding a code-error symmetry observed in a conventional digitally calibrated ADC is reduced by avoiding a code-error symmetry observed in a conventional digitally calibrated ADC is simulated to prove the effectiveness of the proposed ADC architecture.

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CMOS Switch-Current Square Base on Switch Current

  • Parnklang, Jirawath;Muenpan, Sombat;Kumwatchara, Kiatisak;Channarong, Sakonwan
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.318-318
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    • 2000
  • Current signal square based on switch current is presented in this article. This is the new technique that can design current signal square circuit by using switch-current memory cell, current square and sample and hold technique, which have been presented by the general switch-current. This principle which is present have the good electrical characteristics such as the low input impedance, high output impedance and high frequency response. The system can also operate in the audio frequency range to the high frequency current signal. The system application of this technique can be apply to the current signal multiplier by quarter square technique. The experimental results agree well with the theory as high accuracy and linearity.

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Fabrication of Tantalum Nitride Thin-Film as High-temperature Strain Gauges (고온 스트레인 게이지용 질화탄탈박막의 제작)

  • 김재민;최성규;남효덕;정귀상
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.97-100
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    • 2001
  • This paper presents the characteristics of Ta-N thin-film strain gauges as high-temperature strain gauges, which were deposited on Si substrate by DC reactive magnetron sputtering in an argon-nitrogen atmosphere(Ar-(4∼16 %)N$_2$). These films were annealed for 1 hour in 2x10$\^$-6/ Torr vaccum furnace range 500∼1000$^{\circ}C$. The optimized conditions of Ta-N thin-film strain gauges were annealing condition(900$^{\circ}C$, 1 hr.) in 8% N$_2$ gas flow ratio deposition atmosphere. Under optimum conditions, the Ta-N thin-films for strain gauges is obtained a high resistivity, $\rho$=768.93 ${\mu}$Ω cm, a low temperature coefficient of resistance, TCR=-84 ppm/$^{\circ}C$ and a high temporal stability with a good longitudinal gauge factor, GF=4.12.

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Fabrication of a Pd/poly 3C-SiC Schottky diode hydrogensensor and its characteristics (Pd/다결정 3C-SiC 쇼트키 다이오드형 수소센서의 제작과 그 특성)

  • Chung, Gwiy-Sang;Ahn, Jeong-Hak
    • Journal of Sensor Science and Technology
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    • v.18 no.3
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    • pp.222-225
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    • 2009
  • This paper describes the fabrication and characteristics of Schottky micro hydrogen sensors for high temperatures by using polycrystalline(poly) 3C-SiC thin films grown on Si substrates with thermal oxide layer using APCVD. Pd/poly 3C-SiC Schottky diodes were made and evaluated by I-V and C-V measurements. Electric current density and barrier height voltage were $2{\times}10^{-3}A/cm^2$ and 0.58 eV, respectively. These devices could operate stably at about 400 $^{\circ}$. The characteristics of implemented sensors have been investigated in terms of sensitivity, linearity of response, response rate, and response time. Therefore, from these results, Pd/poly 3C-SiC Schottky devices have very high potential for high temperature $H_2$ sensor applications.

A 9-Bit 80-MS/s CMOS Pipelined Folding A/D Converter with an Offset Canceling Technique

  • Lee, Seung-Chul;Jeon, Young-Deuk;Kwon, Jong-Kee
    • ETRI Journal
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    • v.29 no.3
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    • pp.408-410
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    • 2007
  • A 9-bit 80-MS/s CMOS pipelined folding analog-to-digital converter employing offset-canceled preamplifiers and a subranging scheme is proposed to extend the resolution of a folding architecture. A fully differential dc-decoupled structure achieves high linearity in circuit design. The measured differential nonlinearity and integral nonlinearity of the prototype are ${\pm}0.6$ LSB and ${\pm}1.6$ LSB, respectively.

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The Magnetic Sensor with Lateral Field Emitter Arrays (평면구조의 전계방출형 자기 센서)

  • 남명우;김시헌;남태철
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.05a
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    • pp.124-128
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    • 1995
  • We have fabricated the vacuum magnetic device with a lateral field emitter arrays constructed on n-Si wafer, and investigated its magnetic characteristics. The device is consited to tip-arrayed emitter. gate and split-anode, The fabricated vacuum magnetic device has showed a good linearity of magnetic field and a high sensitivity compared with the conventional semiconductor magnetic device.

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Digital Pre-distorter for Communication Transmitters (통신용 송신기의 디지털 Pre-distorter)

  • 한동석;김용정김대진김창주
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.211-214
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    • 1998
  • The high power amplifier (HPA) for broadcasting transmitter systems has nonlinear property in terms of input signal power. Hence, it produces AM/AM and AM/PM modulation to the modulated signal. Therefore, the non-linearity results in bandwidth expansion and nonlinear distortion to in-band signal. In this paper, we propose a simple sain-based predistorter that requires less computational burden and less time for the full initialization of the pre-distorter ROM table.

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Shape Optimization for Magnetic Pole Piece of PM MRI using Nonlinear Parameterized Sensitivity Analysis (매개화된 민감도 해석에 의한 PM MRI의 Pole Piece 형상 최적화)

  • Ryu, Jae-Seop;Koh, Chang-Seop
    • Proceedings of the KIEE Conference
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    • 2004.10a
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    • pp.70-72
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    • 2004
  • The ferromagnetic pole piece of permanent magnet assembly for magnetic resonance imaging(MRI) is optimally designed to get high homogenious magnetic field, taking into account the non-linearity of the magnetic materials. In the design, the pole face is kept smooth and axis-symmetric by using B-spline parameterization, and nonlinear design sensitivity analysis is used for search direction.

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