• Title/Summary/Keyword: heterojunction field-effect transistor

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Design of Normally-Off AlGaN Heterojunction Field Effect Transistor Based on Polarization Engineering (분극 엔지니어링을 통한 상시불통형 질화알루미늄갈륨 이종접합 전계효과 트랜지스터 설계)

  • Cha, Ho-Young;Sung, Hyuk-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2741-2746
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    • 2012
  • In this study, we propose a novel structure based on AlGaN substrate or buffer layer to implement a normally-off mode transistor that was difficult to be realized by conventional AlGaN/GaN heterojunction structures. The channel under the gate can be selectively depleted by growing an upper AlGaN barrier with a higher Al mole fraction and a top GaN charge elimination layer on AlGaN substrate or buffer layer. The proposed AlGaN heterojunction field effect transistor can achieve a threshold voltage of > 2 V, which is generally required in power device specification.

Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications

  • Yoon, Young Jun;Seo, Jae Hwa;Cho, Seongjae;Kwon, Hyuck-In;Lee, Jung-Hee;Kang, In Man
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.2
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    • pp.172-178
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    • 2016
  • In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length ($L_{ch}$) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current ($I_{off}$) of $1.12{\times}10^{-11}A/{\mu}m$. In addition, the use of the highk spacer dielectric $HfO_2$ improves the on-state current ($I_{on}$) with an intrinsic delay time (${\tau}$) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower $I_{off}$ at a lower supply voltage ($V_{DD}$) of 0.2 V.

Design Optimization of a Type-I Heterojunction Tunneling Field-Effect Transistor (I-HTFET) for High Performance Logic Technology

  • Cho, Seong-Jae;Sun, Min-Chul;Kim, Ga-Ram;Kamins, Theodore I.;Park, Byung-Gook;Harris, James S. Jr.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.3
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    • pp.182-189
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    • 2011
  • In this work, a tunneling field-effect transistor (TFET) based on heterojunctions of compound and Group IV semiconductors is introduced and simulated. TFETs based on either silicon or compound semiconductors have been intensively researched due to their merits of robustness against short channel effects (SCEs) and excellent subthreshold swing (SS) characteristics. However, silicon TFETs have the drawback of low on-current and compound ones are difficult to integrate with silicon CMOS circuits. In order to combine the high tunneling efficiency of narrow bandgap material TFETs and the high mobility of III-V TFETs, a Type-I heterojunction tunneling field-effect transistor (I-HTFET) adopting $Ge-Al_xGa_{1-x}As-Ge$ system has been optimized by simulation in terms of aluminum (Al) composition. To maximize device performance, we considered a nanowire structure, and it was shown that high performance (HP) logic technology can be achieved by the proposed device. The optimum Al composition turned out to be around 20% (x=0.2).

Diode Embedded AlGaN/GaN Heterojuction Field-Effect Transistor

  • Park, Sung-Hoon;Lee, Jae-Gil;Cho, Chun-Hyung;Choi, Yearn-Ik;Kim, Hyungtak;Cha, Ho-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.2
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    • pp.215-220
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    • 2016
  • Monolithically integrated devices are strongly desired in next generation power ICs to reduce the chip size and improve the efficiency and frequency response. Three examples of the embedment of different functional diode(s) into AlGaN/GaN heterojunction field-effect transistors are presented, which can minimize the parasitic effects caused by interconnection between devices.

Normally-Off Operation of AlGaN/GaN Heterojunction Field-Effect Transistor with Clamping Diode

  • Han, Sang-Woo;Park, Sung-Hoon;Kim, Hyun-Seop;Lim, Jongtae;Cho, Chun-Hyung;Cha, Ho-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.2
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    • pp.221-225
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    • 2016
  • This paper reports a new method to enable the normally-off operation of AlGaN/GaN heterojunction field-effect transistors (HFETs). A capacitor was connected to the gate input node of a normally-on AlGaN/GaN HFET with a Schottky gate where the Schottky gate acted as a clamping diode. The combination of the capacitor and Schottky gate functioned as a clamp circuit to downshift the input signal to enable the normally-off operation. The normally-off operation with a virtual threshold voltage of 5.3 V was successfully demonstrated with excellent dynamic switching characteristics.

Effective Channel Mobility of AlGaN/GaN-on-Si Recessed-MOS-HFETs

  • Kim, Hyun-Seop;Heo, Seoweon;Cha, Ho-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.867-872
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    • 2016
  • We have investigated the channel mobility of AlGaN/GaN-on-Si recessed-metal-oxide-semiconductor-heterojunction field-effect transistors (recessed-MOS-HFET) with $SiO_2$ gate oxide. Both field-effect mobility and effective mobility for the recessed-MOS channel region were extracted as a function of the effective transverse electric field. The maximum field effect mobility was $380cm^2/V{\cdot}s$ near the threshold voltage. The effective channel mobility at the on-state bias condition was $115cm^2/V{\cdot}s$ at which the effective transverse electric field was 340 kV/cm. The influence of the recessed-MOS region on the overall channel mobility of AlGaN/GaN recessed-MOS-HFETs was also investigated.

Electrical Characteristics of AIGaAs/GaAs HBTs with different Emitter/Base junction structures (접합구조에 따른 AIGaAs/GaAs HBT의 전기적 특성에 관한 연구)

  • 김광식;안형근;한득영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.63-66
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    • 2000
  • In this paper, we present the simulation of the heterojunction bipolar transistor with different Emitter-Base junction structures. Our simulation results include effect of setback and graded layer. We prove the emitter efficiency's improvement through setback and graded layer. In 1995, the analytical equations of electric field, electrostatic potential, and junction capacitance for abrupt and linearly graded heterojunctions with or without a setback layer was derived. But setback layer and linearly graded layer's recombination current was considered numerically. Later, recombination current model included setback layer and graded layer will be proposed. New recombination current model also wile include abrupt heterojunction's recombination current model. In this paper, the material parameters of the heterojunction bipolar transistor with different Emitter-Base junction structures is introduced.

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Evaluation of Radio-Frequency Performance of Gate-All-Around Ge/GaAs Heterojunction Tunneling Field-Effect Transistor with Hetero-Gate-Dielectric by Mixed-Mode Simulation

  • Roh, Hee Bum;Seo, Jae Hwa;Yoon, Young Jun;Bae, Jin-Hyuk;Cho, Eou-Sik;Lee, Jung-Hee;Cho, Seongjae;Kang, In Man
    • Journal of Electrical Engineering and Technology
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    • v.9 no.6
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    • pp.2070-2078
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    • 2014
  • In this work, the frequency response of gate-all-around (GAA) Ge/GaAs heterojunction tunneling field-effect transistor (TFET) with hetero-gate-dielectric (HGD) and pnpn channel doping profile has been analysed by technology computer-aided design (TCAD) device-circuit mixed-mode simulations, with comparison studies among ppn, pnpn, and HGD pnpn TFET devices. By recursive tracing of voltage transfer curves (VTCs) of a common-source (CS) amplifier based on the HGD pnpn TFET, the operation point (Q-point) was obtained at $V_{DS}=1V$, where the maximum available output swing was acquired without waveform distortion. The slope of VTC of the amplifier was 9.21 V/V (19.4 dB), which mainly resulted from the ponderable direct-current (DC) characteristics of HGD pnpn TFET. Along with the DC performances, frequency response with a small-signal voltage of 10 mV has been closely investigated in terms of voltage gain ($A_v$), unit-gain frequency ($f_{unity}$), and cut-off frequency ($f_T$). The Ge/GaAs HGD pnpn TFET demonstrated $A_v=19.4dB$, $f_{unity}=10THz$, $f_T=0.487$ THz and $f_{max}=18THz$.

Electrical Characteristics of Tunneling Field-effect Transistors using Vertical Tunneling Operation Based on AlGaSb/InGaAs

  • Kim, Bo Gyeong;Kwon, Ra Hee;Seo, Jae Hwa;Yoon, Young Jun;Jang, Young In;Cho, Min Su;Lee, Jung-Hee;Cho, Seongjae;Kang, In Man
    • Journal of Electrical Engineering and Technology
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    • v.12 no.6
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    • pp.2324-2332
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    • 2017
  • This paper presents the electrical performances of novel AlGaSb/InGaAs heterojunction-based vertical-tunneling field-effect transistor (VTFET). The device performance was investigated in views of the on-state current ($I_{on}$), drain-induced barrier thinning (DIBT), and subthreshold swing (SS) as the gate length ($L_G$) was scaled down. The proposed TFET with a $L_G$ of 5 nm operated with an $I_{on}$ of $1.3mA/{\mu}m$, a DIBT of 40 mV/V, and an SS of 23 mV/dec at a drain voltage ($V_{DS}$) of 0.23 V. The proposed TFET provided approximately 25 times lower DIBT and 12 times smaller SS compared with the conventional $L_G$ of 5 nm TFET. The AlGaSb/InGaAs VTFET showed extremely high scalability and strong immunity against short-channel effects.

Investigation of InAs/InGaAs/InP Heterojunction Tunneling Field-Effect Transistors

  • Eun, Hye Rim;Woo, Sung Yun;Lee, Hwan Gi;Yoon, Young Jun;Seo, Jae Hwa;Lee, Jung-Hee;Kim, Jungjoon;Kang, In Man
    • Journal of Electrical Engineering and Technology
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    • v.9 no.5
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    • pp.1654-1659
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    • 2014
  • Tunneling field-effect transistors (TFETs) are very applicable to low standby-power application by their virtues of low off-current ($I_{off}$) and small subthreshold swing (S). However, low on-current ($I_{on}$) of silicon-based TFETs has been pointed out as a drawback. To improve $I_{on}$ of TFET, a gate-all-around (GAA) TFET based on III-V compound semiconductor with InAs/InGaAs/InP multiple-heterojunction structure is proposed and investigated. Its performances have been evaluated with the gallium (Ga) composition (x) for $In_{1-x}Ga_xAs$ in the channel region. According to the simulation results for $I_{on}$, $I_{off}$, S, and on/off current ratio ($I_{on}/I_{off}$), the device adopting $In_{0.53}Ga_{0.47}As$ channel showed the optimum direct-current (DC) performance, as a result of controlling the Ga fraction. By introducing an n-type InGaAs thin layer near the source end, improved DC characteristics and radio-frequency (RF) performances were obtained due to boosted band-to-band (BTB) tunneling efficiency.