• Journal of Information Display
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• v.11 no.4
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• pp.165-168
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• 2010

A solution-processed multicomponent oxide, yttrium hafnium zinc oxide (YHZO), was synthesized and deposited as a gate insulator. The YHZO film annealed at $600^{\circ}C$ contained an amorphous phase based on the results of thermogravimetry, differential thermal analysis, and X-ray diffraction. The electrical characteristics of the YHZO film were analyzed by measuring the leakage current. The high dielectric constant (16.4) and high breakdown voltage (71.6 V) of the YHZO films resulted from the characteristics of $HfO_2$ and $Y_2O_3$, respectively. To examine if YHZO can be applied to thin-film transistors (TFTs), indium gallium zinc oxide TFTs with a YHZO gate insulator were also fabricated. The desirable characteristics of the YHZO films when used as a gate insulator show that the limitations of the general binary-oxide-based materials and of the conventional vacuum processes can be overcome.

• ETRI Journal
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• v.36 no.5
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• pp.829-834
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• 2014

In this paper, a lateral power metal-oxide-semiconductor field-effect transistor with ultra-low specific on-resistance is proposed to be applied to a high-voltage (up to 200 V) integrated chip. The proposed structure has two characteristics. Firstly, a high level of drift doping concentration can be kept because a tilt-implanted p-drift layer assists in the full depletion of the n-drift region. Secondly, charge imbalance is avoided by an extended trench gate, which suppresses the trench corner effect occurring in the n-drift region and helps achieve a high breakdown voltage (BV). Compared to a conventional trench gate, the simulation result shows a 37.5% decrease in $R_{on.sp}$ and a 16% improvement in BV.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.5
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• pp.299-301
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• 2000

Analytical expression for the breakdown voltage of the gated diodes were derived as f function of doping concentration and gate voltage, and verified by numerical simulations using ATLAS. The analytical results are in good agreement with simulation results within 5% error when the gate voltage changes from -50V to 130V in case of ND = $1\times1015 cm^{-3}$ and within 10% error when the doping concentration is changed from $5\times1014 cm^{-3}\; to\; 2\times1015 cm6{-3}$, respectively.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.343-346
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• 1998

Ultra-thin gate oxide in MOS devices are subjected to high-field stress during device operation, which degrades the oxide and exentually causes dielectric breakdown. In this paper, we investigate the electrical properties of ultra-thin nitrided oxide (NO) and reoxidized nitrided oxide(ONO) films that are considered to be promising candidates for replacing conventional silicon dioxide film in ULSI level integration. We study vriations of I-V characteristics due to F-N tunneling, and time-dependent dielectric breakdown (TDDB) of thin layer NO and ONO depending on nitridation and reoxidation condition, and compare with thermal $SiO_{2}$. From the measurement results, we find that these NO and ONO thin films are strongly depending on its condition and that optimized reoxided nitrided oxides (ONO) films show superior dielectric characteristics, and breakdown-to-change ( $Q_{bd}$ ) performance over the NO films, while maintaining a similar electric field dependence compared to NO layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.9
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• pp.765-770
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• 2003

We have developed a low-temperature, and low-pressure radical induced oxidation (RIO) technology, so that high-quality ultrathin silicon dioxide layers have been effectively produced with a high reproducibility, and successfully employed to realize high performace SiGe heterostructure complementary MOSFETs (HCMOS) lot the first time. The obtained oxide layer showed comparable leakage and breakdown properties to conventional furnace gate oxides, and no hysteresis was observed during high-frequency capacitance-voltage characterization. Strained SiGe HCMOS transistors with a 2.5 nm-thick gate oxide layer grown by this method exhibited excellent device properties. These suggest that the present technique is particularly suitable for HCMOS devices requiring a fast and high-precision gate oxidation process with a low thermal budget.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.421-424
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• 2004

As the deep sub-micron devices are recently integrated high package density, novel process method for sub $0.1{\mu}m$ devices is required to get the superior thin gate oxide characteristics and reliability. However, few have reported on the electrical quality and reliability on the thin gate oxide. In this paper I will recommand a novel shallow trench isolation structure for thin gate oxide $30{\AA}$ of deep sub-micron devices. Different from using normal LOCOS technology, novel shallow trench isolation have a unique 'inverse narrow channel effects' when the channel width of the devices is scaled down shallow trench isolation has less encroachment into the active device area. Based on the research, I could confirm the successful fabrication of shallow trench isolation(STI) structure by the SEM, in addition to thermally stable silicide process was achiever. I also obtained the decrease threshold voltage value of the channel edge and the contact resistance of $13.2[\Omega/cont.]$ at $0.3{\times}0.3{\mu}m^2$. The reliability was measured from dielectric breakdown time, shallow trench isolation structure had tile stable value of $25[%]{\sim}90[%]$ more than 55[sec].

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.188-198
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• 1993

We have developed a technique for growing thin oxides (6~10 nm) by the Last step TCA method. N-channel metal-oxide-semiconductor (n-MOS) capacitor and n-channel metal-oxide-semiconductor field-effect transistor's (MOSFET's) having a gate oxide with chlorine incorporated $SiO_2/Si$ interface have been analyzed by electrical measurements and physical methods, such as secondary ion mass spectrometry (SIMS) and electron spectroscopy for chemical analysis (ESCA). The gate oxide grown with the Last strp TCA method has good characteristics as follows: the electron mobility of the MOSFET's with the Last step TCA method was increased by about 7% and the defect density at the $SiO_2/Si$ interface decreases slightly compared with that with No TCA method. In reliability estimation, the breakdown field was 18 MV/cm, 0.6 MV/cm higher than that of the gate oxide with No TCA method, and the lifetime estimated by TDDB measurement was longer than 20 years. The device lifetime estimated from hot-carrier reliability was proven to be enhanced. As the results, the gate oxide having a $SiO_2/Si$ interface incorporated with chlorine has good characteristics. Our new technique of Last step TCA method may be used to improve the endurance and retention of MOSFET's and to alleviate the degradation of thin oxides in short-channel MOS devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.853-858
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• 2003

In this study, a new simplified technology for fabricating high density trench gate DMOSFETs using only three mask layers and TEOS/nitride spacer is proposed. Due to the reduced masking steps and self-aligned process, this technique can afford to fabricate DMOSFETs with high cell density up to 100 Mcell/inch$^2$ and cost-effective production. The resulting unit cell pitch was 2.3∼2.4${\mu}$m. The fabricated device exhibited a excellent specific on-resistance characteristic of 0.36m$\Omega$. cm$^2$ with a breakdown voltage of 42V. Moreover, time to breakdown of gate oxide was remarkably increased by the hydrogen annealing after trench etching.

• Journal of the Korean Vacuum Society
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• v.4 no.3
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• pp.301-305
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• 1995

습식 분위기로 성장한 게이트 산화막 위에 다결정 실리콘(poly-Si)과 텅스텐 폴리사이드(WSix/poly-Si)게이트 전극을 형성하여 제작한 금속-산화물-반도체(metal-oxide-semiconductor:MOS)의 전기적 특성을 순간 절연파괴(time zero dielectric breakdown: TZDB)로 평가하였다. 텅스텐 폴리사이드 게이트 전극에 따른 게이트 산화막의 평균 파괴정계는 다결정 실리콘 전극보다 1.93MV/cm 정도 낮았다. 텅스텐 폴리사이드 게이트 전극에서 게이트 산화막의 B model(1-8 MV/cm)불량률은 dry O2 분위기에서 열처리함으로써 증가하였다. 이것은 열처리함으로써 게이트 전극이 silane(SiH4)에 의한 것보다 B mode 불량률이 감소하였다. 그것은 dichlorosilane 환원에 의한 텅스텐 실리사이드내의 불소 농도가 silane에 의한 것보다 낮기 때문이다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.411-414
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• 1999

70 ${\AA}$-thick oxides nitridied at various conditions were reoxidized at pemperatures of 900$^{\circ}C$ in dry-O$_2$ ambients for 5～40 mininutes. The gate oxide interface porperties as well as the oxide substrate interface properties of MOS(Metal Oxide Semiconductor) capacitors with various nitridation conditions, reoxidation conditions and pure oxidation condition were investigated. We stuided I$\sub$g/-V$\sub$g/ characteristics, $\Delta$V$\sub$g/ shift under constant current stress from electrical characteristics point of view and breakdown voltage from leakage current point of view of MOS capacitors with SiO$_2$, NO, RNO dielectrics. Overall, our experimental results show that reoxidized nitrided oxides show inproved charge trapping porperites, I$\sub$g/-V$\sub$g/ characteristics and gate $\Delta$V$\sub$g/ shift. It has also been shown that reoxidized nitridied oxide's leakage currented voltage is better than pure oxide's or nitrided oxide's from leakage current(1${\mu}$A) point of view.