• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.844-847
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• 2001

In this work, transient characteristics of the Non-Punch Through(NPT) Insulated Gate Bipolar Transistor(IGBT) has been studied. we has analyzed with lifetimes excess minority carrier injected into N-dirft, base region of IGBT's BJT part and accumulated charge of on-state which affected swiching characteristic. In this paper, excess minority carrier and charge distribution in active base region is expressed analytically. This analysis proposed optical trade-off between lifetimes and accumulated charge for decreasing switching losses because charge result in switching loss when device was tuned off.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권2호
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• pp.80-87
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• 2011

Low temperature hole transport characteristics of gate-all-around p-channel metal oxide semiconductor (PMOS) type silicon nanowire field-effect-transistors with the radius of 5 nm and lengths of 44-46 nm are presented. They show coexisting two single hole states randomly switching between each other. Analysis of Coulomb diamonds of these two switching states reveals a variety of electrostatic effects which is originated by the potential of a single hole captured in the trap near the nanowire.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권9호
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• pp.546-551
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• 2000

A micromechanical switch that can be used as a logic gate is described in this paper. This switch consists of fixed input electrodes an output electrode Vcc/GND electrodes and movable plates suspended by crab-leg flexures. for mechanical switching of an electrical signal a parallel plate actuator which comes in contact with output electrode was used. Provided that movable plates are connected to Vcc and a low input voltage(ground signal) is applied to the fixed input electrodes the movable plates are pulled by an electrostatic force between the fixed input electrodes and the movable plates. the proposed micromechanical switch was fabricated by surface micromachining technology with$2\mum$ -thick poly-Si and the measured threshold voltage for ON/OFF switching was 23.5V.

• 전기전자학회논문지
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• 제19권1호
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• pp.110-117
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• 2015

In this paper, a novel trench power MOSFET using a Separate-W-gated technique MOSFET (SWFET) is proposed. Because the SWFET has a very low $Q_{GD}$ compared to other forms of technology, it can be applied to high-speed power systems. The results found that the SWFET-applied $Q_{GD}$ was decreased by 40% when compared to simply using the more conventional trench gate MOSFET. $C_{ISS}$ (input capacitance : $C_{GS}+C_{GD}$), $C_{OSS}$ (output capacitance : $C_{GD}+C_{DS}$) and $C_{RSS}$ (reverse recovery capacitance : $C_{GD}$) were improved by 24%, 40%, and 50%, respectively. The switching characteristics of the inverter circuit shows a 24.9% enhancement of reverse recovery time, and the power efficiency of the DC-DC buck converter increased by 14.2%. In addition, the proposed SWFET does not require additional process steps and There was no degradation in the electrical performance of the current-voltage and on-resistance.

• Journal of Power Electronics
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• 제18권1호
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• pp.23-33
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• 2018

Silicon Carbide (SiC) MOSFET belongs to the family of wide-band gap devices with inherit property of low switching and conduction losses. The stable operation of SiC MOSFET at higher operating temperatures has invoked the interest of researchers in terms of its application to high power density (HPD) power converters. This paper presents a performance study of SiC MOSFET based two-phase interleaved boost converter (IBC) for regulation of avionics bus voltage in more electric aircraft (MEA). A 450W HPD, IBC has been developed for study, which delivers 28V output voltage when supplied by 24V battery. A gate driver design for SiC MOSFET is presented which ensures the operation of converter at 250kHz switching frequency, reduces the miller current and gate signal ringing. The peak current mode control (PCMC) has been employed for load voltage regulation. The efficiency of SiC MOSFET based IBC converter is compared against Si counterpart. Experimentally obtained efficiency results are presented to show that SiC MOSFET is the device of choice under a heavy load and high switching frequency operation.

• Journal of Power Electronics
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• 제18권4호
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• pp.985-996
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• 2018

The implementation and performance evaluation of an interleaved boundary conduction mode (BCM) boost power factor correction (PFC) converter is presented in this paper by employing three wide band-gap switching devices: a super junction silicon (Si) MOSFET, a silicon carbide (SiC) MOSFET and a gallium nitride (GaN) high electron mobility transistor (HEMT). The practical considerations for adopting wide band-gap switching devices to BCM boost PFC converters are also addressed. These considerations include the gate drive circuit design and the PCB layout technique for the reliable and efficient operation of a GaN HEMT. In this paper it will be shown that the GaN HEMT exhibits the superior switching characteristics and pronounces its merits at high-frequency operations. The efficiency improvement with the GaN HEMT and its application potentials for high power density/low profile BCM boost PFC converters are demonstrated.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2001년도 추계학술대회 논문집(Proceeding of the KOSME 2001 Autumn Annual Meeting)
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• pp.120-124
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• 2001

A new technique for improving the efficiency of single-phase high-frequency boost converter is proposed. This converter includes an additional low-frequency boost converter which is connected to the main high-frequency switching device in parallel. The additional converter is controlled at lower frequency. Most of the current flows in the low-frequency switch and so, high-frequency switching loss is greatly reduced accordingly Both switching device are controlled by a simple method; each controller consists of a one-shot multivibrator, a comparator and an AND gate. The converter works cooperatively in high efficiency and acts as if it were a conventional high-frequency boost converter with one switching device. The proposed method is verified by simulation. This paper describes the converter configuration and design, and discusses the steady-state performance concerning the switching loss reduction and efficiency improvement.

• Journal of Power Electronics
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• 제11권1호
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• pp.10-15
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• 2011

In this paper, a new soft switching three phase inverter with a quasi-resonant dc-link is presented. The proposed inverter has a dc-link switch and an auxiliary switch. The inverter switches are turned on and off under zero voltage switching condition and all auxiliary circuit switches and diodes are also soft switched. The control utilizes PWM and the auxiliary switch does not require an isolated gate drive circuit. In this paper, the operation analysis and design considerations of the proposed soft switching inverter are discussed. The presented experimental results of a realized prototype confirm the theoretical analysis.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 추계학술대회 논문집 학회본부
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• pp.156-158
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• 1994

In recent days, the various adjustable speed drives are widely employed at the industrial applications for the purpose of energy saving and speed control. In particular, for the machine control applications. the switching frequency is required to be increased for better dynamic performance of the drive. Moreover, this also leads to the reduction of the switching loss of the device. For IGBT (Insulated Gate Bipolar Transistor), the most widely used switching device in the inverters below the 100[kW] range, the falling and falling time is of the order about $200{\sim}300[ns]$. Therefore unexpected phenomena occurs such as voltage spikes due to high gradient of current at the switching instant, the weakening of motor insulation due to high gradient of voltage. In this paper, a new voltage gradient suppression technique is presented in both theoretically and experimentally.

• 한국전기전자재료학회논문지
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• 제31권4호
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• pp.208-211
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• 2018

This paper details the design of a 1,200 V class trench gate field stop IGBT (insulated gate bipolar transistor) with a nano gate structure smaller than 1 um. Decreasing the size is important for lowering the cost and increasing the efficiency of power devices because they are high-voltage switching devices, unlike memory devices. Therefore, in this paper, we used a 2-D device and process simulations to maintain a gate width of less than 1 um, and carried out experiments to determine design and process parameters to optimize the core electrical characteristics, such as breakdown voltage and on-state voltage drop. As a result of these experiments, we obtained a wafer resistivity of $45{\Omega}{\cdot}cm$, a drift layer depth of more than 180 um, an N+ buffer resistivity of 0.08, and an N+ buffer thickness of 0.5 um, which are important for maintaining 1,200 V class IGBTs. Specially, it is more important to optimize the resistivity of the wafer than the depth of the drift layer to maintain a high breakdown voltage for these devices.