• 한국전기전자재료학회논문지
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• 제26권4호
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• pp.271-274
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• 2013

Power Metal Oxide Semiconductor Field Effect Transistor's (MOSFETs) are well known for superior switching speed, and they require very little gate drive power because of the insulated gate. In these respects, power MOSFETs approach the characteristics of an "ideal switch". The main drawback is on-resistance RDS(on) and its strong positive temperature coefficient. While this process has been driven by market place competition with operating parameters determined by products, manufacturing technology innovations that have not necessarily followed such a consistent path have enabled it. This treatise briefly examines metal oxide semiconductor (MOS) device characteristics and elucidates important future issues which semiconductor technologists face as they attempt to continue the rate of progress to the identified terminus of the technology shrink path in about 2020. We could find at the electrical property as variation p base dose. Ultimately, its ON state voltage drop was enhanced also shrink chip size. To obtain an optimized parameter and design, we have simulated over 500 V Field ring using 8 Field rings. Field ring width was $3{\mu}m$ and P base dose was $1e15cm^2$. Also the numerical multiple $2.52cm^2$ was obtained which indicates the doping limit of the original device. We have simulated diffusion condition was split from $1,150^{\circ}C$ to $1,200^{\circ}C$. And then $1,150^{\circ}C$ diffusion time was best condition for break down voltage.

• 한국재료학회지
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• 제9권11호
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• pp.1117-1122
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• 1999

5~10nm 두께의 얇은 산화막 위에 $\alpha$-실리콘과 Co/Ti 이중막을 순차적으로 증착하고 급속열처리하여 코발트 폴리사이드 전극을 만든 후, SADS법으로 다결정 Si을 도핑하여 MOS 커패시터를 제작하였다. 이때 drive-in 열처리조건에 따른 커패시터의 C-V 특성과 누설전류를 측정하여, $\textrm{CoSi}_{2}$의 열적안정성과 도판트 (B 및 As)의 재분포가 Co-폴리사이드 게이트의 전기적 특성에 미치는 영향을 연구하였다.$ 700^{\circ}C$에서 60~80초간 열처리시, 다결정 Si층의 도핑으로 우수한 C-V 특성과 낮은 누설전류를 나타냈으나, 그 이상 장시간 또는 $900^{\circ}C$의 고온에서는 $\textrm{CoSi}_{2}$의 분해에 따른 Co의 확산으로 전기적 특성이 저하되었다. SADS법으로 Co-폴리사이드 게이트 전극을 형성할 때, 도판트가 다결정 Si층으로 충분히 확산되는 것뿐만 아니라, $\textrm{CoSi}_{2}$의 분해를 억제하는 것이 매우 중요하다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.431-433
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• 2009

We developed 4.8 inch WQVGA e-paper on plastic substrate using organic field effect transistors (OFETs). Polyethylene naphthalate (PEN) film was used as a flexible substrate and arrays of OFETs with bottom-gate, bottom-contact structure were fabricated on it. Lowtemperature curable organic gate insulating materials were employed and polymer semiconductor solutions were ink-jetted on arrays with high-resolution. At all steps, process temperature was limited below $130^{\circ}C$. Finally, we could drive flexible e-paper displays based on OFET arrays with the resolution of 100 dpi.

• 융합정보논문지
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• 제11권7호
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• pp.104-110
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• 2021

본 핀 채널 전계 효과 트랜지스터에서 낮은 소스/드레인 직렬 저항을 위한 새로운 선택적 산화 방식을 제안하였다. 이 방법을 이용하면, gate-all-around 구조와 점진적으로 증가되는 형태의 소스/드레인 확장영역을 갖는 핀 채널 MOSFET를 얻을 수 있다. 제안된 트랜지스터는 비교 소자에 비해 70% 이상의 소스/드레인 직렬 저항의 감소를 얻을 수 있다. 또한, 제안된 소자는 단채널 효과를 억제하면서도 높은 구동 전류와 전달컨덕턴스 특징을 보인다. 제작된 소자의 포화전류, 최대 선형 전달컨덕턴스, 최대 포화 전달컨덕턴스, subthreshold swing, 및 DIBL은 각각 305 ㎂/㎛, 0.33 V, 13.5 𝜇S, 76.4 𝜇S, 78 mV/dec, 62 mV/V의 값을 갖는다.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2007년도 춘계학술대회 논문집
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• pp.473-477
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• 2007

The development of advanced Insulated Gate Bipolar Transistor(IGBT)has enabled high-frequency switching operation and has improved the performance of PWM inverters for motor drive. However, the high rate of dv/dt of IGBT has adverse effects on motor insulation stress. In many motor drive applications, the inverter and motor are separated and it requires long motor feds. The long cable contributes high frequency ringing at the motor terminal and it results in hight surge voltage which stresses the motor insulation. The inverter output filter and RDC snubber are conventional method which can reduce the surge voltage. In this paper, we propose the new low loss snubber to reduce the motor terminal surge voltage. The snubber consists of the series connection of charging/discharging capacitor and the voltage-clamped capacitor. At IGBT turn-off, the snubber starts to operate when the IGBT voltage reaches the voltage-clamped level. Since dv/dt is decreased by snubber operating, the peak level of the surge voltage can be reduced. Also the snubber operates at the IGBT voltage above the voltage-clamped level, the snubber loss is largely reduced comparing with RDC snubber. The proposed snubber enables to reduce the motor terminal surge voltage with low loss.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.421-427
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• 2009

We successfully fabricated 4.7-inch organic thin film transistors array with $640{\times}480$ pixels on flexible substrate. All the processes were done by photolithography, spin coating and ink-jet printing. The OTFT-Electrophoretic (EP) pixel structure, based on a top gate OTFT, was fabricated. The mobility, ON/OFF ratio, subthreshold swing and threshold voltage of OTFT on flexible substrate are: 0.01 ^2/V-s, 1.3 V/dec, 10E5 and -3.5 V. After laminated the EP media on OTFT array, a panel of 4.7-inch $640{\times}480$ OTFT-EPD was fabricated. All of process temperature in OTFT-EPD is lower than $150^{\circ}C$. The pixel size in our panel is $150{\mu}m{\times}150{\mu}m$, and the aperture ratio is 50 %. The OTFT channel length and width is 20 um and 200um, respectively. We also used OTFT to drive EP media successfully. The operation voltages that are used on the gate bias are -30 V during the row data selection and the gate bias are 0 V during the row data hold time. The data voltages that are used on the source bias are -20 V, 0 V, and 20 V during display media operation.

• 한국항행학회논문지
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• 제10권2호
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• pp.167-172
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• 2006

본 논문에서는 항공관제용 UHF대역 25W 전력 증폭기를 설계 및 제작하였다. 전력 증폭기는 구동단, 전력 증폭단 및 제어부로 구성되었으며, 광대역 동작을 위하여 부궤환 회로 및 동축선로 발룬이 사용되었다. 선형성 및 효율성이 우수한 VDMOS를 전력소자로 사용하였으며, AB급 바이어스에서 push-pull 증폭을 하도록 설계하였다. 설계된 전력 증폭기는 게이트단에 음성 신호가 인가되었을 때 안정적인 AM 변조 특성을 나타내었으며, 상용 항공관제용 무선 송신기의 출력 사양을 만족하도록 설계 및 구현되었다.

• 조명전기설비학회논문지
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• 제23권9호
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• pp.124-129
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• 2009

최근 자동차 및 자동화 등 많은 첨단 산업분야에서 산업용 모터 정밀 제어를 위한 인버터의 요구가 증가하고 있다. 본 논문에서는 FPGA를 이용하여 단일 제어 유닛으로 여러 개의 모터를 제어할 수 있는 SVPWM 모듈을 설계 제작하여 모터 정밀제어에 응용하고자 한다. 개발된 WVPWM 모듈에는 PWM 발생기뿐만 아니라 위치 및 전류센서 처리 부분과 데프타임 보상기 알고리즘도 함께 구현되었다. 개발 툴은 ALTERA Quartus 8.0을 사용하였으며 시뮬레이션에 의해 동작 특성을 검증하였고 실험을 통해 성능을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.430-433
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• 2003

IGBTS are widely used for the industrial inverters in the mid power range at low voltage (440V$\~$660V) application. Advantageous features of the device are simple gate drive and high speed switching capability. Due to these advantages the application of IGBTS is enlarging into the high power application. However, to increase the power handling capacity at lower input voltage level, the current rating in each bridge arm must be enlarged. Therefore the parallel operation of IGBT devices is essentially needed. This paper describes the feasible parallel structures of the power circuit for the mid & the high power inverters and introduces the important design condition for the parallel operation of IGBT devices. To verify feasibility of the IGBT parallel operation, the feature of several IGBT devices (EUPEC, SEMIKRON's IGBT) are investigated and the power stacks are implemented and tested with these devices. The experimental results show the good characteristics for the parallel operation of IGBTS.

• 한국전기전자재료학회논문지
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• 제22권11호
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• pp.910-917
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• 2009

We have designed a new structures of Junction Field Effect Transistor(JFET) using SILVACO simulation to improve electrical properties and process reliability. The device structure and process conditions of Si control JFET(Si JFET) were determined to set cut off voltage and drain current(at Vg=0 V) to -0.46 V and $300\;{\mu}A$, respectively. Among many design parameters influencing the performance of the device, the drive-in time of p-type gate is presented most predominant effects. Therefore we newly designed SiGe JFET, in which SiGe layers were placed above and underneath of Si-channel. The presence of SiGe layer could lessen Boron into the n-type Si channel, so that it would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer could be explained in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.