• Title/Summary/Keyword: gate drive

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Study on High Efficiency Boosting-up Circuit for Renewable Energy Application (신재생에너지용 연계형 인버터의 고효율 승압에 관한 연구)

  • Jung, Tae-Uk;Kim, Ju-Yong;Choi, Se-Kwon;Cho, Jun-Seok;Kho, Hee-Seok
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2009.05a
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    • pp.336-339
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    • 2009
  • In this paper, such as battery power or solar energy and fuel cells generated from Renewable energy sources, high voltage to low voltage DC-DC Converter for converting the design of the study. System consists of low voltage ($24{\sim}28$ [VDC]) and Boosts the voltage (270 [VDC]) for a 3 [kW] DC-DC converter and control circuit is configured as, Power switch the ST Tomson's Automotive low voltage high current MOSFET switches STE250NS10S (temperature 250A) was applied to the two parallel. Also, Controller's processor used ATMEGA128, and Gate Drive applies and composed Photo Coupler TLP250. development. Input voltage (24V) and output voltage (270V) for Conversion in the H-bridge converter topology of the circuit output side power and voltage to control the implementation of the Phase shift angle control applied. And, 3kW of power to pass appropriate specification of the secondary side as interpreted by the high frequency transformer, and the experimental production and analysis of the experiment

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A Printing Process for Source/Drain Electrodes of OTFT Array by using Surface Energy Difference of PVP (Poly 4-vinylphenol) Gate Dielectric (PVP(Poly 4-vinylphenol) 게이트 유전체의 표면에너지 차이를 이용한 유기박막트랜지스터 어레이의 소스/드레인 전극 인쇄공정)

  • Choi, Jae-Cheol;Song, Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.3
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    • pp.7-11
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    • 2011
  • In this paper, we proposed a simple and high-yield printing process for source and drain electrodes of organic thin film transistor (OTFT). The surface energy of PVP (poly 4-vinylphenol) gate dielectric was decreased from 56 $mJ/m^2$ to 45 $mJ/m^2$ by adding fluoride of 3000ppm into it. Meanwhile the surface energy of source and drain (S/D) electrodes area on the PVP was increased to 87 $mJ/m^2$ by treating the areas, which was patterned by photolithography, with oxygen plasma, maximizing the surface energy difference from the other areas. A conductive polymer, G-PEDOT:PSS, was deposited on the S/D electrode areas by brushing painting process. With such a simple process we could obtain a high yield of above 90 % in $16{\times}16$ arrays of OTFTs. The performance of OTFTs with the fluoride-added PVP was similar to that of OTFTs with the ordinary PVP without fluoride, generating the mobility of 0.1 $cm^2/V.sec$, which was sufficient enough to drive electrophoretic display (EPD) sheet. The EPD panel employing the OTFT-backpane successfully demonstrated to display some patterns on it.

Design and Fabrication of 5 GHz Band MMIC Power Amplifier for Wireless LAN Applications Using Size Optimization of PHEMTs (PHEMT 크기 최적화를 이용한 무선랜용 5 GHz 대역 MMIC 전력증폭기 설계 및 제작)

  • Park Hun;Hwang In-Gab;Yoon Kyung-Sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6A
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    • pp.634-639
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    • 2006
  • In this paper an MMIC 2-stage power amplifier is designed and fabricated for 5GHz wireless LAN applications using $0.5{\mu}m$ gate length PHEMT transistors. The PHEMT gate width is optimized in order to meet the linearity and efficiency of the MMIC power amplifier. The $0.5{\mu}m\times600{\mu}m$ PHEMT for the drive stage and $0.5{\mu}m\times3000{\mu}m$ PHEMT for the amplification stage are the optimized sizes to achieve more than 25dBc of third order IMD at the power level of 3dB back-off from the input P1dB and more than 22dBm output power under a supply voltage of 3.3V. The two-stage MMIC power amplifier is designed to be used for the both of HIPERLAN/2 and IEEE 802.11a because of its broadband characteristics. The fabricated PHEMT MMIC power amplifier exhibits a 20.1dB linear power gain, a maximum 22dBm output power, a 24% power added efficiency under 3.3V supply voltage. The input and output on-chip matching circuits are included on a chip of $1400\times1200{\mu}m^2$.

The design and FPGA implementation of a general-purpose LDI controller for the portable small-medium sized TFT-LCD (중소형 TFT-LCD용 범용 LDI 제어기의 설계 및 FPGA 구현)

  • Lee, Si-Hyun
    • Journal of the Korea Society of Computer and Information
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    • v.12 no.4
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    • pp.249-256
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    • 2007
  • AIn this paper, a new desist of LDI controller IC for general purpose is proposed for driving the LDI(LCD Driver Interface) controller in $4{\sim}9$ inches sized portable small-medium TFT-LCD(Thin Film Transistor addressed -Liquid Crystal Display) panel module. The designed LDI controller was verified on the FPGA(Reld Programmable Gate Array) test board, and was made the interactive operation with the commercial TFT-LCD panel successfully. The purpose of design is that it is standardized the LDI controller's operation by one LDI controller for driving all TFT-LCD panel without classifying the panel vendor, and size. The main advantage for new general-purpose LDI controller is the usage for the desist of all panel's SoG(System on a Glass) module because of the design for the standard operation. And in the previous method, it used each LDI controller for every LCD vendor, and panel size, but because a new one can drive all portable small-medium sized panel, it results in reduction of LDI controller supply price, and manufacturing cost of AV(Audio Video) board and panel. In the near future, the development of SoG IC(Integrated Circuit) for manufacturing more excellent functional TFT-LCD panel module is necessary. As a result of this research, the TFT-LCD panel can make more small size, and light weight, and it results in an upturn of domestic company's share in the world market. With the suggested theory in this paper, it expects to be made use of a basic data for developing and manufacturing for the SoG chip of TFT-LCD panel module.

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A Ripple Rejection Inherited RPWM for VSI Working with Fluctuating DC Link Voltage

  • Jarin, T.;Subburaj, P.;Bright, Shibu J V
    • Journal of Electrical Engineering and Technology
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    • v.10 no.5
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    • pp.2018-2030
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    • 2015
  • A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

FPGA Modem Platform Design for eHSPA and Its Regularized Verification Methodology (eHSPA 규격을 만족하는 FPGA모뎀 플랫폼 설계 및 검증기법)

  • Kwon, Hyun-Il;Kim, Kyung-Ho;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.24-30
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    • 2009
  • In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

Highly Manufacturable 65nm McFET (Multi-channel Field Effect Transistor) SRAM Cell with Extremely High Performance

  • Kim, Sung-Min;Yoon, Eun-Jung;Kim, Min-Sang;Li, Ming;Oh, Chang-Woo;Lee, Sung-Young;Yeo, Kyoung-Hwan;Kim, Sung-Hwan;Choe, Dong-Uk;Suk, Sung-Dae;Kim, Dong-Won;Park, Dong-Gun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.1
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    • pp.22-29
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    • 2006
  • We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

Design of an NMOS Current-Mirror Type Bridge Rectifier for driving RFID chips (RFID 칩 구동을 위한 NMOS 전류미러형 브리지 정류기의 설계)

  • Park, Kwang-Min;Hur, Myung-Joon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.2
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    • pp.333-338
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    • 2008
  • In this paper, a new NMOS current-mirror type bridge rectifier for driving RFID chips, whose minimum input voltage required to obtain the effective DC output voltage is low enough and whose power dissipation can be reduced than that of conventional one, is proposed. The designed rectifier is able to supply high enough and well-rectified DC voltages to drive RFID transponder chips for the frequency range of 13.56 MHz HF(for ISO 18000-3), 915 MHz UHF(fur ISO 18000-6), and 2.45 GHz microwave(for ISO 18000-4). Output characteristics of the proposed rectifier are analyzed with the high frequency equivalent circuit. And the circuitry method for effective reducing of the gate leakage current due to the increasing of operating frequency is also proposed theoretically. Using this method, the power consumption of $100\;{\mu}W$ and the DC output voltage of 2.13V for 3V peak-to-peak input voltage and $45\;K{\Omega}$ load resistance are obtained. Compared to conventional one, the proposed rectifier operates in more stable and shows superior characteristics in UHF and microwave frequencies.

Dynamic Characteristics of Metal-induced Unilaterally Crystallized Polycrystalline Silicon Thin-film Transistor Devices and Circuits Fabricated with Precrystallization (선결정화법을 이용한 금속 유도 일측면 결정화에 의해 제작된 다결정 실리콘 박막 트랜지스터 소자 및 회로의 전기적 특성 개선 효과)

  • Hwang, Wook-Jung;Kang, Il-Suk;Kim, Young-Su;Yang, Jun-Mo;Ahn, Chi-Won;Hong, Soon-Ku
    • Journal of the Korean Vacuum Society
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    • v.17 no.5
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    • pp.461-465
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    • 2008
  • The phase transformation in a film influences its surrounding. Effects of the precrystallization method, which removes influences on gate oxide caused by lateral crystallization, in metal-induced unilaterally crystallized polycrystalline silicon thin-film transistor devices and circuits were studied. Device by the method was shown to have a higher current drive, compared with conventional postcrystallized device. Moreover, we studied DC bias-induced changes in the performance of ring oscillator. PMOS inverters fabricated using precrystallized silicon films have very high dynamic and stable performance, compared with inverters fabricated using postcrystallized silicon films.

A 77GHz MMIC Transceiver Module for Automotive Forward-Looking Radar Sensor

  • Kang, Dong-Min;Hong, Ju-Yeon;Shim, Jae-Yeob;Yoon, Hyung-Sup;Lee, Kyung-Ho
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.609-610
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    • 2006
  • A 77GHz MMIC transceiver module consisting of a power amplifier, a low noise amplifier, a drive amplifier, a frequency doubler and a down-mixer has been developed for automotive forward-looking radar sensor. The MMIC chip set was fabricated using $0.15{\mu}m$ gate-length InGaAs/InAlAs/GaAs mHEMT process based on 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20dB from $76{\sim}77GHz$ with 15.5dBm output power. The chip size is $2mm{\times}2mm$. The low noise amplifier achieved a gain of 20dB in a band between $76{\sim}77\;GHz$ with an output power of 10dBm. The chip size is $2.2mm{\times}2mm$. The driver amplifier exhibited a gain of 23dB over a $76{\sim}77\;GHz$ band with an output power of 13dBm. The chip size is $2.1mm{\times}2mm$. The frequency doubler achieved an output power of -16dBm at 76.5GHz with a conversion gain of -16dB for an input power of 10dBm and a 38.25GHz input frequency. The chip size is $1.2mm{\times}1.2mm$. The down-mixer demonstrated a measured conversion gain of over -9dB. The chip size is $1.3mm{\times}1.9mm$. The transceiver module achieved an output power of 10dBm in a band between $76{\sim}77GHz$ with a receiver P1dB of -28dBm. The module size is $8{\times}9.5{\times}2.4mm^3$. This MMIC transceiver module is suitable for the 77GHz automotive radar systems and related applications in W-band.

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