• Title/Summary/Keyword: gain-flatness

Search Result 94, Processing Time 0.021 seconds

6-18 GHz MMIC Drive and Power Amplifiers

  • Kim, Hong-Teuk;Jeon, Moon-Suk;Chung, Ki-Woong;Youngwoo Kwon
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.2 no.2
    • /
    • pp.125-131
    • /
    • 2002
  • This paper presents MMIC drive and power amplifiers covering 6-18 ㎓. For simple wideband impedance matching and less sensitivity to fabrication variation, modified distributed topologies are employed in the both amplifiers. Cascade amplifiers with a self-biasing circuit through feedback resistors are used as unit gain blocks in the drive amplifier, resulting in high gain, high stability, and compact chip size. Self impedance matching and high-pass, low-pass impedance matching networks are used in the power amplifier. In measured results, the drive amplifier showed good return losses ($S_11,{\;}S_{22}{\;}<{\;}-10.5{\;}dB$), gain flatness ($S_{21}={\;}16{\;}{\pm}0.6{\;}dB$), and $P_{1dB}{\;}>{\;}22{\;}dBm$ over 6-18 GHz. The power amplifier showed $P_{1dB}{\;}>{\;}28.8{\;}dBm$ and $P_{sat}{\;}{\approx}{\;}30.0{\;}dBm$ with good small signal characteristics ($S_{11}<-10{\;}dB,{\;}S_{22}{\;}<{\;}-6{\;}dB,{\;}and{\;}S_{21}={\;}18.5{\;}{\pm}{\;}1.25{\;}dB$) over 6-18 GHz.

E-Band Wideband MMIC Receiver Using 0.1 ${\mu}m$ GaAs pHEMT Process

  • Kim, Bong-Su;Byun, Woo-Jin;Kang, Min-Soo;Kim, Kwang Seon
    • ETRI Journal
    • /
    • v.34 no.4
    • /
    • pp.485-491
    • /
    • 2012
  • In this paper, the implementations of a $0.1{\mu}m$ gallium arsenide (GaAs) pseudomorphic high electron mobility transistor process for a low noise amplifier (LNA), a subharmonically pumped (SHP) mixer, and a single-chip receiver for 70/80 GHz point-to-point communications are presented. To obtain high-gain performance and good flatness for a 15 GHz (71 GHz to 86 GHz) wideband LNA, a five-stage input/output port transmission line matching method is used. To decrease the package loss and cost, 2nd and 4th SHP mixers were designed. From the measured results, the five-stage LNA shows a gain of 23 dB and a noise figure of 4.5 dB. The 2nd and 4th SHP mixers show conversion losses of 12 dB and 17 dB and input P1dB of -1.5 dBm to 1.5 dBm. Finally, a single-chip receiver based on the 4th SHP mixer shows a gain of 6 dB, a noise figure of 6 dB, and an input P1dB of -21 dBm.

A Study on Design of the LNA for 2.4GHz WLAN Using LTCC Process (LTCC 공정을 이용한 2.4GHz WLAN 대역 LNA 설계)

  • Oh Jae-Wook;Yang Jae-Soo;Kim Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
    • /
    • 2006.08a
    • /
    • pp.215-218
    • /
    • 2006
  • In this paper, a small size, $7{\times}6mm^2$, Low Noise Amplifier(LNA) using LTCC process was fabricated with multi-layer structure for 2.4GHz wireless LAN. The measured results demonstrate that the bandwidth is 130 MHz, and the operating frequency is from 2.39GHz to 2.52GHz. The power gain is above 7.3 dB in the operating frequency range and the gain flatness is 0.5 dB. The maximum S11 is -4 dB and the maximum S22 is -7.5 dB. The noise figure is less than 1.83 dB. The measured power gain, S11 and S22 were had poorer performance than the simulation results. The reason for this discrepancy is that the input and output matching was not performed exactly. However, the noise figure of the LTCC low noise amplifier is better than simulation result. It is found that it is possible to fabricate a LTCC low noise amplifier in a small size.

  • PDF

A 0.13 ${\mu}m$ CMOS UWB RF Transmitter with an On-Chip T/R Switch

  • Kim, Chang-Wan;Duong, Quoc-Hoang;Lee, Seung-Sik;Lee, Sang-Gug
    • ETRI Journal
    • /
    • v.30 no.4
    • /
    • pp.526-534
    • /
    • 2008
  • This paper presents a fully integrated 0.13 ${\mu}m$ CMOS MB-OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low-pass filter, a variable gain amplifier, a voltage-to-current converter, an I/Q up-mixer, a differential-to-single-ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 ${\mu}m$ CMOS technology. The fabricated transmitter shows a -3 dB bandwidth of 550 MHz at each sub-band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.

  • PDF

A Study on the Design of the Low Noise Amplifier for 2.4GHz wireless LAN using LICC Passive Components (LTCC 적층소자를 이용한 2.4GHz 무선랜 대역 LNA의 설계에 관한 연구)

  • Oh, Jae-Wook;Kim, Hyeong-Seok;Chung, Tae-Kyung
    • Proceedings of the KIEE Conference
    • /
    • 2006.07c
    • /
    • pp.1599-1600
    • /
    • 2006
  • In this paper, a small size, $7{\times}6\;mm^2$, Low Noise Amplifier(LNA) using LTCC process was fabricated with multi-layer structure for 2.4GHz wireless LAN. The measured results demonstrate that the bandwidth is 130 MHz, and the operating frequency is from 2.39GHz to 2.52GHz. The power gain is above 7.3 dB in the operating frequency range and the gain flatness is 0.5 dB. The maximum S11 is -4 dB and the maximum S22 is -7.5 dB. The noise figure is less than 1.83 dB. The measured power gain, S11 and S22 were had poorer performance than the simulation results. The reason for this discrepancy is that the input and output matching was not performed exactly. However, the noise figure of the LTCC low noise amplifier is better than simulation result. It is found that it is possible to fabricate a LTCC low noise amplifier in a small size.

  • PDF

50 cm of Zirconia, Bismuth and Silica Erbium-doped Fibers for Double-pass Amplification with a Broadband Mirror

  • Markom, Arni Munira;Muhammad, Ahmad Razif;Paul, Mukul Chandra;Harun, Sulaiman Wadi
    • Current Optics and Photonics
    • /
    • v.6 no.1
    • /
    • pp.32-38
    • /
    • 2022
  • Erbium-doped fiber amplifiers (EDFAs) have saturated the technological market but are still widely used in high-speed and long-distance communication systems. To overcome EDFA saturation and limitations, its erbium-doped fiber is co-doped with other materials such as zirconia and bismuth. This article demonstrates and compares the performance using three different fibers as the gain medium for zirconia-erbium-doped fibers (Zr-EDF), bismuth-erbium-doped fibers (Bi-EDF), and commercial silica-erbium-doped fibers (Si- EDF). The optical amplifier was configured with a double-pass amplification system, with a broadband mirror at the end of its configuration to allow double-pass operation in the system. The important parameters in amplifiers such as optical properties, optical amplification and noise values were also examined and discussed. All three fibers were 0.5 m long and entered with different input signals: 30 dBm for low input and 10 dBm for high input. Zr-EDF turned out to be the most relevant optical amplifier as it had the highest optical gain, longest transmission distance, highest average flatness gain with minimal jitter, and relevant noise figures suitable for the latest communication technology.

Design and Implementation of Linear Gain Equalizer for Microwave band (초고주파용 선형 이득 등화기 설계 및 제작)

  • Kim, Kyoo-Hwan
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.17 no.11
    • /
    • pp.635-639
    • /
    • 2016
  • In the devices used in the microwave frequency band, the gain decreases as the frequency increases due to the parasitic component. To compensate for these characteristics, a linear gain equalizer with an opposite slope is needed in wideband systems, such as those used for electronic warfare. In this study, a linear gain equalizer that can be used in the 18 ~ 40GHz band is designed and fabricated. Circuit design and momentum design (optimizations) were carried out to reduce the errors between design and manufacturing. A thin film process is used to minimize the parasitic components within the implementation frequency band. A sheet resistance of 100 ohm/square was employed to minimize the wavelength variation due to the length of the thin film resistor. This linear gain equalizer is a structure that combines a quarter wavelength-resonator on a series microstrip line with a resistor. All three 1/4 wavelength short resonators were used. The fabricated linear gain equalizer has a loss of more than -5dB at 40GHz and a 6dB slope in the 18 ~ 40GHz band. By using the manufactured gain equalizer in a multi-stage connected device such as an electronic warfare receiver, the gain flatness degradation with increasing frequency can be reduced.

A Design and Fabrication of a High Power SSPA for C-Band Satellite Communication (C-Band 위성통신용 고출력 증폭기의 설계 및 제작)

  • 예성혁;윤순경;전형준;나극환
    • Proceedings of the Korean Society of Broadcast Engineers Conference
    • /
    • 1996.06a
    • /
    • pp.27-31
    • /
    • 1996
  • In this paper, The SSPA(Solid State Power Amplifier) is 100 watts amplifier which is used with C-Band Satellite communication Up-Link frequency, 5.875 ∼6.425 GHz. SSPA requires more output power than is available from a single GaAs FET with result it is necessary to combine the output of many device. To achieve a high power, it is important to make a good N-way power divider which has a small different phase, good combining efficiency and high power handling capability. The reliability of Power GaAs FET decrease with increasing junction temperature, power amplifier in general dissipate amount of power. It is important to provide them with a heatsink and a temperature compensation circuit to dispose of the unwanted heat. To compensate temperature, Using PIN diode attenuator, it is enable to get a precision gain control. The output power of the SSPA is more than 100 watt with which the TWTA (Traveling-Wave Tube Amplifier) can be replaced. Each stage was measured by the Network analyzer PH8510C, Power meter Booton 42BD, The gain is more than 53 dB, flatness is less than 1.5 dB.

  • PDF

A 3.1 to 5 GHz CMOS Transceiver for DS-UWB Systems

  • Park, Bong-Hyuk;Lee, Kyung-Ai;Hong, Song-Cheol;Choi, Sang-Sung
    • ETRI Journal
    • /
    • v.29 no.4
    • /
    • pp.421-429
    • /
    • 2007
  • This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

  • PDF

A Study of Suppression Current for LDMOS under Variation of Temperature (온도변화에 따른 LDMOS의 전류변동 억제에 관한 연구)

  • Jeon, Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.30 no.8
    • /
    • pp.901-906
    • /
    • 2006
  • In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.