ETRI Journal
- Volume 29 Issue 4
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- Pages.421-429
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- 2007
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- 1225-6463(pISSN)
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- 2233-7326(eISSN)
A 3.1 to 5 GHz CMOS Transceiver for DS-UWB Systems
- Park, Bong-Hyuk (Digital Home Research Division, ETRI) ;
- Lee, Kyung-Ai (Department of Electrical Engineering, KAIST) ;
- Hong, Song-Cheol (Department of Electrical Engineering, KAIST) ;
- Choi, Sang-Sung (Digital Home Research Division, ETRI)
- Received : 2006.12.04
- Published : 2007.08.31
Abstract
This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0