• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.10a
• /
• pp.361-364
• /
• 2013

Since the non-overlapping gate driver used in conventional DC-DC boost converters generates fixed dead-times, the converters suffer from the body-diode conduction loss or the charge-sharing loss. A adaptive control method has been proposed to reduce these loses. In this method, however, occurrence of and overlapping time of two power transistors in CCM results in reduction of efficiency. In this paper, to overcome this problem a new adaptive control method in proposed, and a DC-DC boost converter with the proposed adaptive control and power switching has been designed in a 0.35um CMOS process. The designed converter outputs 3.3V from a input voltage of 2.5V. The switching frequency is 500kHz and the maximum power efficiency is 95.3% at a load current 150mA. The designed chip area is $1720um{\times}1280um$.

• Proceedings of the KIEE Conference
• /
• 2003.10b
• /
• pp.174-176
• /
• 2003

The power conversion system must be increased switching frequency in order to achieve a small size, a light weight and a low noise. This paper proposes a skillful and a concise PWM DC-DC converter employing both zero voltage and zero current high frequency switching(ZVCS) operation. The Proposal ZVCS circuit is composed with resonant circuit using active resonant condenser. And this circuit provides switches with ZVS and ZCS by quasi resonant only that switching transients appear. This operation results in reduction of stress and losses in the power devices and resonant components. Some simulation results are included to confirm the validity of the analytical results.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.6
• /
• pp.35-42
• /
• 2010

This paper describes a 10 bit 80MHz CMOS D/A converter for wireless communication system. The proposed circuit in the paper is implemented with a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process. The architecture of the circuit consists of the 4bit LSB with binary decoder, and both the 3bit ULSB and the 3bit MSB with the thermometer decoder. The measurement results demonstrates SFDR of 60.42dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB of 8.75bit. INL and DNL have been measured to be ${\pm}$0.38LSB and ${\pm}$0.32LSB and glitch energy is measured to be 4.6$pV{\cdot}s$. Total power dissipation is 48mW at 80MHz(maximum sampling frequency) with a single power supply of 1.8V.

• Journal of Power Electronics
• /
• v.17 no.6
• /
• pp.1535-1544
• /
• 2017

Advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. FPGA based HIL (Hardware-In-the-Loop) simulators have revolutionized control hardware and software development for power electronics. Common time step sizes in the order of 100ns are sufficient for simulating switching frequency current and voltage ripples. In order to keep the time step as small as possible, ideal switching function models are often used to simulate the phase legs. This often produces inferior results when simulating the discontinuous conduction mode (DCM) and disabled operational states. Therefore, the corresponding measurement and protection units cannot be tested properly. This paper describes a new solution for this problem utilizing a discrete-time PI controller. The PI controller simulates the proper DC and low frequency AC components of the phase leg voltage during disabled operation. It also retains the advantage of fast real-time execution of switch-based models when an accurate simulation of high frequency junction capacitor oscillations is not necessary.

• Journal of Power Electronics
• /
• v.16 no.5
• /
• pp.1939-1949
• /
• 2016

This paper presents an alternative frequency adaptive grid synchronization technique named HDN-FLL, which can accurately extract the fundamental positive- and negative-sequence components and interested harmonics in adverse three-phase grid voltage. The HDN-FLL is based on the harmonic decoupling network (HDN) consisting of multiple first order complex vector filters (FOCVF) with a frequency-locked loop (FLL), which makes the system frequency adaptive. The stability of the proposed FLL is strictly verified to be global asymptotically stable. In addition, the linearization and parameters tuning of the FLL is also discussed. The structure of the HDN has been widely used as a prefilter in grid synchronization techniques. However, the stability of the general HDN is seldom discussed. In this paper, the transfer function expression of the general HDN is deduced and its stability is verified by the root locus method. To show the advantages of the HDN-FLL, a simulation comparison with other gird synchronization methods is carried out. Experimental results verify the excellent performance of the proposed synchronization method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.20 no.11
• /
• pp.948-952
• /
• 2007

In this study, a low temperature sintering multilayer piezoelectric transformer for a DC-DC converter was manufactured using $(Pb,Ca,Sr,)(Ti,Mn,Sb)O_3$ ceramics. Its electrical properties were investigated according to the variation in frequency and load resistance. The voltage step-up ratio of the multilayer piezoelectric transformer showed a maximum value at a resonant frequency of input part and increased with an increase of load resistance. The efficiency of the multilayer piezoelectric transformer showed the highest value at a load resistance of 17 $\Omega$. The output power was increased with increasing input voltage. Temperature increase of the multilayer piezoelectric transformer was increased with the increase of output power. At the load resistance of 17 $\Omega$, the multilayer piezoelectric transformer showed the temperature rises of about $20^{\circ}C$ at the output power of 18 W, and stable driving characteristics.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.27 no.3
• /
• pp.79-86
• /
• 2013

In order to analyze the electrical performance of ZnO surge arresters stressed by the combined DC and AC voltages that are generated in DC/AC converter systems, the leakage current properties of ZnO surge arrester blocks deteriorated by impulse currents were investigated. The test specimens were deteriorated by the 8/$20{\mu}s$ impulse current of 2.5kA and the leakage currents flowing into the deteriorated zinc oxide(ZnO) arrester blocks subjected to the combined DC and power frequency AC voltages are measured. As a result, the leakage currents flowing through deteriorated ZnO surge arrester blocks were higher than those flowing through the fine ZnO surge arrester blocks and the larger the injection number of 8/$20{\mu}s$ impulse current of 2.5kA is, the greater the leakage current is. The leakage current-voltage curves(I-V curves) of the fine and deteriorated ZnO surge arrester blocks stressed by the combined DC and AC voltages show significant difference in the low conduction region. Also the cross-over phenomenon is observed at the voltage close to the knee of conduction on plots of I-V curves.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.36D no.9
• /
• pp.37-45
• /
• 1999

For the purpose of reducing the output voltage fluctuation of thin film multijunction thermal converter, EVANOHM alloy-S and chromel-alumel thermocouple were used as a thin film heater material and as a thermoelement of thrmopile, respectively. The temperature coefficient of the resistance of thin film EVANOHM alloy-S heater was about $1.4 {\times} 10^4/^{\circ}C$, which is very small compared to other materials, and thin film chromel-alumel thermocouple showed relatively small difference of the Seebeck coefficients about $38 {\mu}V/K$. The output voltage fluctuation of the thermal converter was about 0.06% for the initial 120 seconds in air and decreased considerably after preheating for 5 minutes or more. The respective AC-DC voltage and current transfer error ranges of the thermal converter were about ${\pm}$1.6 ppm and ${\pm}$0.7 ppm in the frequency range from 10Hz to 10 kHz and increased remarkably below 10 Hz or above 10 kHz.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.6
• /
• pp.16-24
• /
• 2009

In this paper, DC-DC buck converter with on-chip filter inductor and capacitor is presented. By operating at high switching frequency of 50MHz with stacked interleaved topology, we reduced inductor and capacitor sizes compared to previously published DC-DC buck converters. The proposed circuit is designed in a standard $0.5{\mu}m$ CMOS process, and chip area is $9mm^2$. This circuit operated at the input voltage of $3{\sim}5V$ range, the maximum load current of 250mA, and the maximum efficiency of 71%.

• Proceedings of the KIEE Conference
• /
• 2008.07a
• /
• pp.1488-1490
• /
• 2008

The gyroscope is the sensor for detecting the rotation in inertial reference frame and constitute the navigation system together an accelerometer. As the inertial reference equipment for attitude determination and control in the satellite, the mechanical gyroscope has been used but it bring the disturbance for mass unbalance so the disturbance give a bad influence to the observation satellite mission because the mechanical gyroscope has the rotation parts. During the launch, The mechanical gyroscope is weak in vibration, shock and has the defect of narrow operating temperature range so it need the special design in integration. Recently the low orbit observation satellite for seeking the high pointing accuracy of image camera payload accept the FOG(Fiber Optic Gyro) or RLG(Ring Laser Gyro) for the attitude determination and control. The Ring Laser Gyro makes use of the Sanac effect within a resonant ring cavity of a He-Ne laser and has more accuracy than the other gyros. It need the 1000V DC to create the He-Ne plasma in discharge tube. In this paper, the design process of the High Voltage Power Supply for RLG(Ring Laser Gyroscope) is described. The specification for High Voltage Power Supply(HVPS) is proposed. Also, The analysis of flyback converter topology is explained. The Design for the HVPS is composed of the inverter circuit, feedback control circuit, high frequency switching transformer design and voltage doubler circuit.