• 한국초전도학회:학술대회논문집
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• 한국초전도학회 2000년도 High Temperature Superconductivity Vol.X
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• pp.207-210
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• 2000

Properties of SrTiO$_3$ thin films were characterized under the influence of an applied dc voltage utilizing a gold resonator with a flip-chip capacitor. The measurements were performed at microwave frequency ranges and low temperatures cryogenic temperatures. The dielectric constant of 830 and the low loss tangent of 6X10$^{-3}$ at 3.64 GHz were observed at 90 K and 100 V. The quality in the SrTiO$_3$ film was presented in terms of fractional frequency under the bias voltages and cryogenic temperatures.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.270-274
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• 2002

We have developed a new COG technique using flip chip solder joining technology for excellent resolution and high quality LCD panels. Using the eutectic Bi-Sn and the eutectic In-Ag solder bumps of 50-80 ${\mu}m$ pitch sizes, a ultrafine interconnection between IC and glass substrate was successfully made at or below $160^{\circ}C$. The contact resistance and reliability of Bi-Sn solder joint showed the superiority over the conventional ACF bonding.

• 대한전자공학회논문지SD
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• 제43권9호
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• pp.1-9
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• 2006

System-On-Chip(SoC) 설계에서 글로벌 와이어는 성능에 큰 영향을 끼친다. 이 때문에 플림플롭이나 래치를 사용한 와이어 파이프라이닝이 필요하게 되었다. 래치는 플립플롭에 비해 타이밍 제약이 유연하므로 래치 파이프라이닝이 플립플롭에 비해 클락 주기를 더 작게 할 수 있다. 리타이밍은 회로의 메모리 요소를 이동시켜 최적화된 클락 주기를 얻는 방법이다. SoC 리타이밍은 기존의 게이트 레벨 리타이밍과 달리 SoC 회로를 대상으로 한다. 본 논문에서는 기존의 플립플롭을 사용한 SoC 리타이밍 방법을 래치를 사용한 경우에도 적용할 수 있게 확장 시켰다. 본 논문에서는 래치를 사용한 SoC 리타이밍 문제를 해결하기 위해 MILP로 식을 세우고, 이를 고정점 계산을 통해 효과적으로 해결 하였다. 실험 결과 본 논문의 방법을 적용할 경우 플립플롭 SoC 리타이밍에 비해 평균적으로 클락 주기를 10% 감소시킬 수 있었다.

• Tribology and Lubricants
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• 제28권4호
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• pp.173-177
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• 2012

We used contact resonance force microscopy (CRFM) technique to determine the quantitative elastic properties of multiple materials integrated on the sub micrometer scale. The CRFM approach measures the frequencies of an AFM cantilever's first two flexural resonances while in contact with a material. The plain strain modulus of an unknown or test material can be obtained by comparing the resonant spectrum of the test material to that of a reference material. In this study we examined the following bumping materials for flip chip by using copper electrode as a reference material: NiP, Solder (Sn-Au-Cu alloy) and under filled epoxy. Data were analyzed by conventional beam dynamics and contact dynamics. The results showed a good agreement (~15% difference) with corresponding values determined by nanoindentaion. These results provide insight into the use of CRFM methods to attain reliable and accurate measurements of elastic properties of materials on the nanoscale.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• 한국재료학회지
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• 제6권7호
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• pp.700-708
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• 1996

Flip chip bonding에 무전해도금기술을 적용하여 solder bumper형성의 최적 조건을 규명하였다. 시편은 AI 패턴된 4 inch Si 웨이퍼를 사용하고, 활성화 처리시 zincate 용액을 사용하였으며, 무전해 도금은 Ni-P 도금액고 Au immersion 용액을 사용하였다. 활성화 물질의 AI 침식정도 및 Zn 석출 정도를 알아보기 위하여 EDS측정을 하였고, 각 공전에서의 표면형상을 알아보기 위해 SEM 분석을 하였다. 열처리 후 금도금층의 주 결정성장 방향은 XRD를 이용하여 측정하였다. 산처리에서 질산과 황산 중 질산에 의한 산화막제거 정도가 더 우수하게 나타났다. 활성화 처리시 zincate 용액을 희석시킬수록 입자 크기가 미세해 지고, 활성화 물질은 pH 13-13.5, 상온, 농도 15-25%의조건에서 크기가 작은 Zn 활성화 물질이 균일하게 분포하였다. Ni과 Auan전해도금 속도는 온도와 pH가 증가할수록 증가하였다. Ni 무전해 도금 조건은 pH 4.5, 온도 $90^{\circ}C$, 시간 20분이며, Au 무전해 도금조건은 pH7, 온도 $80^{\circ}C$, 시간 10분이었다. 상온에서 $400^{\circ}C$까지 30분동안 열처리 한 후 금도금막의 결정 방향은 pH 7, 온도 $80^{\circ}C$, 시간 10분이었다. 상온에서 $400^{\circ}C$까지 30분 동안 열처리 한 후 금도금막의 결정 방향은 pH 7에서 (111), pH 9에서는 (200)과 (111)이 주 peak로 나타났으며, 열처리에 의한 결정 방향의 변화는 없었다. 전체 공정에서 최종적인 표면 형상에 영향을 주는 단계는 활성화 처리로서 flip chip의 bonding layer형성에 가장 중요한 요소임을 알 수 있었다.보다 자생지(自生地)에서 높은 함량(含量)을 보였다. 5. 무기성분함양(無機成分含量)의 차이(差異)는 K의 경우(境遇) 자생지(自生地)에서 보다 재배지(栽培地)에서 평균적(平均的)으로 10배이상(倍以上) 정도(程度) 높은 함량(含量)의 차이(差異)를 보였으나 Mn, Zn, Na, Cu 등(等)은 일정(一定)한 경향(傾向)을 보이지 않는 것으로 나타났다. 6. 유리(遊離) 아미노산(酸)의 함량(含量)은 자생지(自生地은)보다 재배지(栽培地)에서 전반적(全般的)으로 높은 함량(含量)을 나타내었고, 특(特)히 Arginine은 다른 성분(成分)들과 비교(比較)해 볼 때 가장 높은 조성(組成)의 차이(差異)를 나타내었다. 7. 야생(野生)더덕과 재배(栽培)더덕의 정유성분수율(精油成分收率)은 자생지재배(自生地栽培)에서는 모두 0.004% 였고 재배지(栽培地)에서는 야생(野生)더덕이 0.005%였다. 8. 더덕의 재배장소(栽培場所)에 따른 향기성분(香氣成分)은 총(總) 21종(種)이었으며 自生地(自生地)에서 야생(野生)더덕은 16종(種), 재배(栽培)더덕은 18종(種)이었고, 재배지(栽培地)에서 야생(野生) 더덕은 14종(種), 재배(栽培)더덕은 20(種)이었다. 9. Trans-2-hexanol은 야생(野生)더덕의 자생지(自生地) 재배(栽培)에서 피이크 면적(面積) 당(當) 50.3%, 재배지(栽培地)에서 피이크 면적(面積) 당(當) 43.3%를 보였으며 amylalcohol, furfuryl acetate, 2-methoxy-4-vinyl phenol(MVP)는 재배(栽培)더덕에서만 확인(確認)되었다.는 KI, BMI와 유의적인 양의 상관관계를 보였고 (p<0.01), HCL-C은 비체중, BMI, LBM, TBM와 유의적인 음의 상관관계를 보였으며, (p<0.01), KI, SBP와도 음의 상관관계를 보였다. (p<0.05), LCL-C는 KI와 유의적이인 양의

• 대한기계학회:학술대회논문집
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• 대한기계학회 2004년도 추계학술대회
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• pp.1231-1235
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• 2004

The needs of micro scale thermal detecting technique are increasing in biology and chemical industry. For example, Thermal finger print, Micro PCR(polymer chain reaction), ${\mu}TAS$ and so on. To satisfy these needs, we developed a DTSA(Diode Temperature Sensor Array) for detecting and controlling the temperature on small surface. The DTSA is fabricated by using VLSI technique. It consists of 32 ${\times}$ 32 array of diodes (1,024 diodes) for temperature detection and 8 heaters for temperature control on a 8mm ${\times}$ 8mm surface area. The working principle of temperature detection is that the forward voltage drop across a silicon diode is approximately proportional to the inverse of the absolute temperature of diode. And eight heaters ($1K{\Omega}$) made of poly-silicon are added onto a silicon wafer and controlled individually to maintain a uniform temperature distribution across the DTSA. Flip chip packaging used for easy connection of the DTSA. The circuitry for scanning and controlling DTSA are also developed

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2007년 추계학술발표대회 개요집
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• pp.150-152
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• 2007

It has been known that the underfilling technique is effective in reducing thermal and environmental stress concentration at solder joint in FC asscemblies. In this paper, the effect of thermomechanical properties of underfill such as coefficient of thermal expansion(CTE) and Young's modulus on reliability of FC assembly under thermal cycling was investigated. For parametric study for optimal design of underfill, finite element analyses(FEA) were performed for seven different CTEs and five different Young's modulus. The results show that the concentrated maximum stress decreases as Young's modulus of underfill increases and the CTE of underfill decreases.

• 전자통신동향분석
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• 제33권6호
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• pp.50-57
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• 2018

As devices have evolved, traditional flip chip bonding and recently commercialized thermocompression bonding techniques have been limited. Laser-assisted bonding is attracting attention as a technology that satisfies both the requirements of mass production and the yield enhancement of advanced packaging interconnections, which are weak points of these bonding technologies. The laser-assisted bonding technique can be applied not only to a two-dimensional bonding but also to a three-dimensional stacked structure, and can be applied to various types of device bonding such as electronic devices; display devices, e.g., LEDs; and sensors.

• Journal of Welding and Joining
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• 제21권2호
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• pp.97-101
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• 2003

The change of microstructures in the base metal during transient liquid phase bonding process of directionally Ni base superalloy, GID-111 was investigated. Bonds were fabricated using a series of holding times(0~7.2ks) at three different temperatures. The flip chip bonding utilizing self-aligning characteristic of solder becomes mandatory to meet tolerances for the optical device. In this paper, a parametric study of aging condition and pad size of samples was evaluated. A TiW/Cu/electroplated Cu UBM structure was selected and the samples were aging treated to analyze the effect of intermetallic compounds with the time variations. An FIB technique was applied to the preparation of samples for TEM observations. An FIB technique is very useful to prepare TEM thin foil specimens from the solder joint interface. After aging treatment, the tendency to decrease in shear strength was measured and the structure of the solder and the UBM was observed by using SEM, TEM and EDS. As a result, the shear strength was decreased of about 21% in the 100${\mu}{\textrm}{m}$ sample at 17$0^{\circ}C$ aging compared with the maximum shear strength of the sample with the same pad size. In the case of the 12$0^{\circ}C$ aging treatment, 18% of decrease in shear strength was measured at the 100${\mu}{\textrm}{m}$ pad size sample. An intermetallic compound of Cu6Sn5 and Cu3Sn were also observed through the TEM measurement by using.