• Title/Summary/Keyword: finite fields(Galois fields)

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Derivation of Galois Switching Functions by Lagrange's Interpolation Method (Lagrange 보간법에 의한 Galois 스윗칭함수 구성)

  • 김흥수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.15 no.5
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    • pp.29-33
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    • 1978
  • In this paper, the properties of Galois fields defined over any finite field are analysed to derive Galois switching functions and the arithmetic operation methods over any finite field are showed. The polynomial expansions over finite fields by Lagrange's interpolation method are derived and proved. The results are applied to multivalued single variable logic networks.

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THE q-ADIC LIFTINGS OF CODES OVER FINITE FIELDS

  • Park, Young Ho
    • Korean Journal of Mathematics
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    • v.26 no.3
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    • pp.537-544
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    • 2018
  • There is a standard construction of lifting cyclic codes over the prime finite field ${\mathbb{Z}}_p$ to the rings ${\mathbb{Z}}_{p^e}$ and to the ring of p-adic integers. We generalize this construction for arbitrary finite fields. This will naturally enable us to lift codes over finite fields ${\mathbb{F}}_{p^r}$ to codes over Galois rings GR($p^e$, r). We give concrete examples with all of the lifts.

A Study on Constructing the Sequential Logic Machines over Finite Fields (유한체상의 순차논리머시인 구성에 관한 연구)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.880-883
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    • 2005
  • This paper presents a method of constructing the sequential logic machines over finite fields(or galois fields). The proposed the sequential logic machines is constructed by as following. First of all, we obtain the linear characteristics between present state and next state based on mathematical properties of finite fields and sequential logic machines. Next, we realize the sequential logic machines over finite field GF(P) using above linear characteristics and characteristic polynomial that expressed using by matrix.

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REMARKS ON GAUSS SUMS OVER GALOIS RINGS

  • Kwon, Tae Ryong;Yoo, Won Sok
    • Korean Journal of Mathematics
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    • v.17 no.1
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    • pp.43-52
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    • 2009
  • The Galois ring is a finite extension of the ring of integers modulo a prime power. We consider characters on Galois rings. In analogy with finite fields, we investigate complete Gauss sums over Galois rings. In particular, we analyze [1, Proposition 3] and give some lemmas related to [1, Proposition 3].

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Arithmetic of finite fields with shifted polynomial basis (변형된 다항식 기저를 이용한 유한체의 연산)

  • 이성재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.9 no.4
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    • pp.3-10
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    • 1999
  • More concerns are concentrated in finite fields arithmetic as finite fields being applied for Elliptic curve cryptosystem coding theory and etc. Finite fields arithmetic is affected in represen -tation of those. Optimal normal basis is effective in hardware implementation and polynomial field which is effective in the basis conversion with optimal normal basis and show that the arithmetic of finite field with the basis is effective in software implementation.

A Study on Constructing the Divider using Sequential Logic Systems (순차논리시스템을 이용한 제산기 구성에 관한 연구)

  • Park, Chun-Myoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.6
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    • pp.1441-1446
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    • 2010
  • This paper presents a method of constructing the divider using sequential logic systems over finite fields(or galois fields). The proposed the sequential logic systems is constructed by as following. First of all, we obtain the linear characteristics between present state and next state based on mathematical properties of finite fields and sequential logic systems. Next, we realize the sequential logic systems over finite fields using above linear characteristics and characteristic polynomial which is expressed using by matrix. Also, we apply to implement divider using the proposed sequential logic systems over finite fields.

A Study on Constructing the Multiple-Valued Logic Systems over Finite Fields using by the Decision Diagram (결정도(決定圖)에 기초(基礎)한 유한체상(有限體上)의 다치논리(多値論理)시스템구성(構成)에 관한 연구(硏究))

  • Park, Chun-Myoung
    • Journal of IKEEE
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    • v.3 no.2 s.5
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    • pp.295-304
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    • 1999
  • This paper presents a method of constructing the Multiple-Valued Logic Systems(MVLS) over Finite Fields(FF) using by Decision Diagram(DD) that is based on Graph Theory. The proposed method is as following. First, we derivate the Ordered Multiple-Valued Logic Decision Diagram(OMVLDD) based on the multiple-valued Shannon's expansion theorem and we execute function decomposition using by sub-graph. Next, we propose the variable selecting algorithm and simplification algorithm after apply the each isomorphism and reodering vertex. Also we propose MVLS design method.

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Low Complexity Systolic Montgomery Multiplication over Finite Fields GF(2m) (유한체상의 낮은 복잡도를 갖는 시스톨릭 몽고메리 곱셈)

  • Lee, Keonjik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.18 no.1
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    • pp.1-9
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    • 2022
  • Galois field arithmetic is important in error correcting codes and public-key cryptography schemes. Hardware realization of these schemes requires an efficient implementation of Galois field arithmetic operations. Multiplication is the main finite field operation and designing efficient multiplier can clearly affect the performance of compute-intensive applications. Diverse algorithms and hardware architectures are presented in the literature for hardware realization of Galois field multiplication to acquire a reduction in time and area. This paper presents a low complexity semi-systolic multiplier to facilitate parallel processing by partitioning Montgomery modular multiplication (MMM) into two independent and identical units and two-level systolic computation scheme. Analytical results indicate that the proposed multiplier achieves lower area-time (AT) complexity compared to related multipliers. Moreover, the proposed method has regularity, concurrency, and modularity, and thus is well suited for VLSI implementation. It can be applied as a core circuit for multiplication and division/exponentiation.

Design of VLSI Architecture for Efficient Exponentiation on $GF(2^m)$ ($GF(2^m)$ 상에서의 효율적인 지수제곱 연산을 위한 VLSI Architecture 설계)

  • 한영모
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.41 no.6
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    • pp.27-35
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    • 2004
  • Finite or Galois fields have been used in numerous applications such as error correcting codes, digital signal processing and cryptography. These applications often require exponetiation on GF(2$^{m}$ ) which is a very computationally intensive operation. Most of the existing methods implemented the exponetiation by iterative methods using repeated multiplications, which leads to much computational load, or needed much hardware cost because of their structural complexity in implementing. In this paper, we present an effective VLSI architecture for exponentiation on GF(2$^{m}$ ). This circuit computes the exponentiation by multiplying product terms, each of which corresponds to an exponent bit. Until now use of this type algorithm has been confined to a primitive element but we generalize it to any elements in GF(2$^{m}$ ).