• Title/Summary/Keyword: fault analysis of semiconductor

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Fault Analysis of Semiconductor Device (반도체 장치의 결함해석)

  • Park, S.J.;Choi, S.B.;Oh, C.S.
    • Journal of Energy Engineering
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    • v.25 no.1
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    • pp.192-197
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    • 2016
  • We have surveyed on technical method of fault analysis of semiconductor device. Fault analysis of semiconductor should first be found the places of fault spots. For this process they are generally used the testers; EB(emission beam tester), EM(emission microscope), OBIRCH(optical beam induced resistance change method) and LVP(laser voltage probing) etc. Therefore we have described about physical interpretation and technical method in using scanning electron microscope, transmission electron microscope, focused ion beam tester and Nano prober.

One-class Classification based Fault Classification for Semiconductor Process Cyclic Signal (단일 클래스 분류기법을 이용한 반도체 공정 주기 신호의 이상분류)

  • Cho, Min-Young;Baek, Jun-Geol
    • IE interfaces
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    • v.25 no.2
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    • pp.170-177
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    • 2012
  • Process control is essential to operate the semiconductor process efficiently. This paper consider fault classification of semiconductor based cyclic signal for process control. In general, process signal usually take the different pattern depending on some different cause of fault. If faults can be classified by cause of faults, it could improve the process control through a definite and rapid diagnosis. One of the most important thing is a finding definite diagnosis in fault classification, even-though it is classified several times. This paper proposes the method that one-class classifier classify fault causes as each classes. Hotelling T2 chart, kNNDD(k-Nearest Neighbor Data Description), Distance based Novelty Detection are used to perform the one-class classifier. PCA(Principal Component Analysis) is also used to reduce the data dimension because the length of process signal is too long generally. In experiment, it generates the data based real signal patterns from semiconductor process. The objective of this experiment is to compare between the proposed method and SVM(Support Vector Machine). Most of the experiments' results show that proposed method using Distance based Novelty Detection has a good performance in classification and diagnosis problems.

Fault Diagnosis in Semiconductor Etch Equipment Using Bayesian Networks

  • Nawaz, Javeria Muhammad;Arshad, Muhammad Zeeshan;Hong, Sang Jeen
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.252-261
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    • 2014
  • A Bayesian network (BN) based fault diagnosis framework for semiconductor etching equipment is presented. Suggested framework contains data preprocessing, data synchronization, time series modeling, and BN inference, and the established BNs show the cause and effect relationship in the equipment module level. Statistically significant state variable identification (SVID) data of etch equipment are preselected using principal component analysis (PCA) and derivative dynamic time warping (DDTW) is employed for data synchronization. Elman's recurrent neural networks (ERNNs) for individual SVID parameters are constructed, and the predicted errors of ERNNs are then used for assigning prior conditional probability in BN inference of the fault diagnosis. For the demonstration of the proposed methodology, 300 mm etch equipment model is reconstructed in subsystem levels, and several fault diagnosis scenarios are considered. BNs for the equipment fault diagnosis consists of three layers of nodes, such as root cause (RC), module (M), and data parameter (DP), and the constructed BN illustrates how the observed fault is related with possible root causes. Four out of five different types of fault scenarios are successfully diagnosed with the proposed inference methodology.

A Stator Fault Diagnosis of an Induction Motor based on the Phase Angle of Park's Vector Approach (Park's Vector Approach의 위상각 변이를 활용한 유도전동기 고정자 고장진단)

  • Go, Young-Jin;Lee, Buhm;Song, Myung-Hyun;Kim, Kyoung-Min
    • Journal of Institute of Control, Robotics and Systems
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    • v.20 no.4
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    • pp.408-413
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    • 2014
  • In this paper, we propose a fault diagnosis method based on Park's Vector Approach using the Euler's theorem. If we interpreted it as Euler's theorem, it is possible to easily find the phase angle difference between the healthy condition and the fault condition. And, we analyzed the variation of the phase angle and performed the diagnostic method of the induction motor using feature vectors that were obtained by using a Fourier transform. The analysis of time and speed variation of the motor was performed and, as a result, we could find more soft variations than rough variations. In particular, the analysis of the distortion through each phase shows that two-turn and four-turn shorted motors are linearly separable. In this experiment, we know that the maximum breakdown threshold value for determining steady-state fault detection is 49.0788. Simulation and experimental results show the more detectable than conventional method.

Fault Detection in Semiconductor Manufacturing Using Statistical Method

  • Lim, Woo-Yup;Jeon, Sung-Ik;Han, Seung-Soo;Soh, Dae-Wha;Hong, Sang-Jeen
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.44-44
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    • 2009
  • Fault detection is necessary for yield enhancement and cost reduction in semiconductor manufacturing. Sensory data acquired from the semiconductor processing tool is too large to analyze for the purpose of fault detection and classification(FDC). We studied the techniques of fault detection using statistical method. Multiple regression analysis smoothly detected faults and can be easy made a model. For real-time and fast computing time, the huge data was analyzed by each step. We also considered interaction and critical factors in tool parameters and process.

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Virtual ground monitoring for high fault coverage of linear analog circuits

  • Roh, Jeongjin
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.3
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    • pp.226-232
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    • 2002
  • This paper explains a technique to improve the fault coverage of oscillation-test [1-5] for linear analog circuits. The transient behavior of the virtual ground is monitored during oscillation to extract information of the circuit. The limitation of the oscillation-test is analyzed, and an efficient signature analysis technique is proposed to maximize the fault coverage. The experimental result proves that the parametric fault coverage can be significantly increased by the proposed technique.

Semi-Supervised Learning for Fault Detection and Classification of Plasma Etch Equipment (준지도학습 기반 반도체 공정 이상 상태 감지 및 분류)

  • Lee, Yong Ho;Choi, Jeong Eun;Hong, Sang Jeen
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.4
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    • pp.121-125
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    • 2020
  • With miniaturization of semiconductor, the manufacturing process become more complex, and undetected small changes in the state of the equipment have unexpectedly changed the process results. Fault detection classification (FDC) system that conducts more active data analysis is feasible to achieve more precise manufacturing process control with advanced machine learning method. However, applying machine learning, especially in supervised learning criteria, requires an arduous data labeling process for the construction of machine learning data. In this paper, we propose a semi-supervised learning to minimize the data labeling work for the data preprocessing. We employed equipment status variable identification (SVID) data and optical emission spectroscopy data (OES) in silicon etch with SF6/O2/Ar gas mixture, and the result shows as high as 95.2% of labeling accuracy with the suggested semi-supervised learning algorithm.

APC Technique and Fault Detection and Classification System in Semiconductor Manufacturing Process (반도체 공정에서의 APC 기법 및 이상감지 및 분류 시스템)

  • Ha, Dae-Geun;Koo, Jun-Mo;Park, Dam-Dae;Han, Chong-Hun
    • Journal of Institute of Control, Robotics and Systems
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    • v.21 no.9
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    • pp.875-880
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    • 2015
  • Traditional semiconductor process control has been performed through statistical process control techniques in a constant process-recipe conditions. However, the complexity of the interior of the etching apparatus plasma physics, quantitative modeling of process conditions due to the many difficult features constraints apply simple SISO control scheme. The introduction of the Advanced Process Control (APC) as a way to overcome the limits has been using the APC process control methodology run-to-run, wafer-to-wafer, or the yield of the semiconductor manufacturing process to the real-time process control, performance, it is possible to improve production. In addition, it is possible to establish a hierarchical structure of the process control made by the process control unit and associated algorithms and etching apparatus, the process unit, the overall process. In this study, the research focused on the methodology and monitoring improvements in performance needed to consider the process management of future developments in the semiconductor manufacturing process in accordance with the age of the APC analysis in real applications of the semiconductor manufacturing process and process fault diagnosis and control techniques in progress.

Feature Based Decision Tree Model for Fault Detection and Classification of Semiconductor Process (반도체 공정의 이상 탐지와 분류를 위한 특징 기반 의사결정 트리)

  • Son, Ji-Hun;Ko, Jong-Myoung;Kim, Chang-Ouk
    • IE interfaces
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    • v.22 no.2
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    • pp.126-134
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    • 2009
  • As product quality and yield are essential factors in semiconductor manufacturing, monitoring the main manufacturing steps is a critical task. For the purpose, FDC(Fault detection and classification) is used for diagnosing fault states in the processes by monitoring data stream collected by equipment sensors. This paper proposes an FDC model based on decision tree which provides if-then classification rules for causal analysis of the processing results. Unlike previous decision tree approaches, we reflect the structural aspect of the data stream to FDC. For this, we segment the data stream into multiple subregions, define structural features for each subregion, and select the features which have high relevance to results of the process and low redundancy to other features. As the result, we can construct simple, but highly accurate FDC model. Experiments using the data stream collected from etching process show that the proposed method is able to classify normal/abnormal states with high accuracy.

Analysis on Fault Current Limiting Operation of Three-Phase Transformer Type SFCL Using Double Quench (이중퀜치를 이용한 삼상변압기형 한류기의 고장전류제한 동작 분석)

  • Han, Tae-Hee;Ko, Seok-Cheol;Lim, Sung-Hun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.2
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    • pp.184-189
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    • 2022
  • In this paper, the fault current limiting operations of three-phase transformer type superconducting fault current limiter (SFCL) using double quench, which consisted of E-I iron core with three legs wound by primary and secondary windings and two superconducting modules (SCMs), were analyzed according to three-phase ground fault types. To verify the effective operation of the three-phase transformer type SFCL using double quench, the test circuit for three-phase ground faults was constructed, and the fault current tests were carried out. Through analysis on the fault current test results, the different fault current limiting characteristics of three-phase transformer type SFCL using double quench from three-phase transformer type SFCL using three SCMs were discussed.