• Journal of the Microelectronics and Packaging Society
• /
• v.21 no.2
• /
• pp.71-78
• /
• 2014

Silicon has been most widely used semiconductor material for power electronic systems. However, Si-based power devices have attained their working limits and there are a lot of efforts for alternative Si-based power devices for better performance. Advances in power electronics have improved the efficiency, size, weight and materials cost. New wide band gap materials such as SiC have now been introduced for high power applications. SiC power devices have been evolved from lab scale to a viable alternative to Si electronics in high-efficiency and high-power density applications. In this article, the potential impact of SiC devices for power applications will be discussed along with their Si counterpart in terms of higher switching performance, higher voltages and higher power density. The recent progress in the development of high voltage power semiconductor devices is reviewed. Future trends in device development and industrialization are also addressed.

• Proceedings of the Korean Society of Postharvest Science and Technology of Agricultural Products Conference
• /
• 2003.10a
• /
• pp.139.2-139
• /
• 2003

The packaging and irradiation effects on the volatile compounds of red pepper powder were investigated. The red pepper powder (Capsicum annuum) was prepackaged in vacuum (PE/Nylon film bag), and irradiated with the dose of 0, 3, 5 or 7 kGy at 0$^{\circ}C$. The odor of irradiated red pepper powder was classified into 4 groups (0, 3, 5, and 7 kGy) by electronic nose using metal oxide sensors, and the volatile compounds developed by irradiation were analyzed by GC-MS along with solid phase microextraction. Hexanoic acid and tetramethyl pyrazine, which were found in red pepper powder of 0 kGy, disappeared in irradiated red pepper powder. Further, 1,3-bis(1,1-dimethylethyl)-benzene was detected by GC-MS as a new developed volatile compound in irradiated red pepper, and this compound was identified to be originated from packaging material not from red pepper powder. This study showed that off-odor from packaging materials was responsible for the volatiles produced from dried food treated with irradiation.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.4
• /
• pp.9-15
• /
• 2018

This paper shows the principles and characteristics of the transient liquid phase (TLP) bonding technology for power modules packaging. The power module is semiconductor parts that change and manage power entering electronic devices, and demand is increasing due to the advent of the fourth industrial revolution. Higher operation temperatures and increasing current density are important for the performance of power modules. Conventional power modules using Si chip have reached the limit of theoretical performance development. In addition, their efficiency is reduced at high temperature because of the low properties of Si. Therefore, Si is changed to silicon carbide (SiC) and gallium nitride (GaN). Various methods of bonding have been studied, like Ag sintering and Sn-Au solder, to keep up with the development of chips, one of which is TLP bonding. TLP bonding has the advantages in price and junction temperature over other technologies. In this paper, TLP bonding using various materials and methods is introduced. In addition, new TLP technologies that are combined with other technologies such as metal powder mixing and ultrasonic technology are also reviewed.

• Journal of the Microelectronics and Packaging Society
• /
• v.30 no.4
• /
• pp.86-90
• /
• 2023

The packaging of electronic devices performs a protective function to ensure that their durability and reliability are not affected by changes in the operating environment caused by external factors. Recent advances in materials have led to ongoing research into bonded packaging of heterogeneous materials such as polymers and inorganic materials in electronic devices. In this packaging process, it is important to have a binding that joins the materials and ensures the operating environment, which includes adhesion to the substrate, corrosion and oxidation resistance through moisture removal, and durability. In this study, the hygroscopicity of the coating layer by modifying the polymer surface based on PVA was evaluated by controlling and measuring the contact angle, and the adhesion was confirmed by applying water-based ink and testing according to ASTM_D3363. For the durability of the polymer surface, the IPL post-treatment process was used to improve the hardness and toughness against applied voltage, and the pencil hardness test and nanoindentation test were conducted. Through this, we analyzed and proposed solutions to ensure the reliability and durability of polymer devices in polymer microfabrication against environmental factors such as moisture, temperature fluctuations and adhesion, and surface abrasion.

• Journal of the Microelectronics and Packaging Society
• /
• v.31 no.3
• /
• pp.42-49
• /
• 2024

In the electromagnetic wave shielding material market, superior shielding performance in the high-frequency range, along with flexibility and durability, has emerged as critical requirements. The need for high-performance EMI (Electromagnetic Interference) films to address electromagnetic wave interference issues is growing, particularly in various industrial sectors such as smart electronic devices, automotive electronic systems, and communication equipment. In this study, a trimodal silver paste was developed and fabricated into an EMI film, with its performance evaluated. The developed silver paste, utilizing a modified epoxy binder, exhibited properties suitable for screen printing processes. The film demonstrated excellent shielding performance, with an average attenuation of -99 dB in the high-frequency range of the 5G spectrum (26.5 GHz to 40 GHz), and a shielding effectiveness of -90.3 dB at 33.6 GHz. Flexibility and durability tests showed that the film maintained its flexibility even at a curvature radius of 1 mm. In the bending cycle test, the resistance increased by approximately 25.5% from 0.51 Ω to 0.64 Ω after 10,000 cycles in the outer bending scenario, while in the inner bending scenario, the resistance decreased by about 3.6%, indicating reduced resistance to compressive stress.

• Journal of the Microelectronics and Packaging Society
• /
• v.28 no.1
• /
• pp.1-12
• /
• 2021

Here, we introduce a laser-induced graphene synthesis technology and its applications for the electric/electronic device manufacturing process. Recently, the micro/nanopatterning technique of graphene has received great attention for the utilization of these new graphene structures, which shows progress developments at present with a variety of uses in electronic devices. Some examples of practical applications suggested a great potential for the tunable graphene synthetic manners through the control of the laser set-up, such as a selection of the wavelength, power adjustment, and optical techniques. This emerging technology has expandability to electric/electronic devices combined together with existed micro-packaging technology and can be integrated with the new processing steps to be applied for the operation in the fields of biosensors, supercapacitors, electrochemical sensors, etc. We believe that the laser-induced graphene technology introduced in this paper can be easily applied to portable small electronic devices and wearable electronics in the near future.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.1
• /
• pp.41-45
• /
• 2018

As the size of semiconductor chip shrinks, the electronic industry has been paying close attention to fan-out wafer level packaging (FO-WLP) as an emerging solution to accommodate high input and output density. FO-WLP also has several advantages, such as thin thickness and good thermal resistance, compared to conventional packaging technologies. However, one major challenge in current FO-WLP manufacturing process is to control wafer warpage, caused by the difference of coefficient of thermal expansion and Young's modulus among the materials. Wafer warpage induces misalignment of chips and interconnects, which eventually reduces product quality and reliability in high volume manufacturing. In order to control wafer warpage, it is necessary to understand the effect of material properties and design parameters, such as chip size, chip to mold ratio, and carrier thickness, during packaging processes. This paper focuses on the effects of thickness of chip and molding compound on 12" wafer warpage after PMC of EMC using finite element analysis. As a result, the largest warpage was observed at specific thickness ratio of chip and EMC.

• Journal of the Microelectronics and Packaging Society
• /
• v.22 no.1
• /
• pp.35-41
• /
• 2015

In this study, in order to improve the reliability of ACF interconnections, solder ACF joints were investigated interms of solder joint morphology and solder wetting areas, and evaluated the electrical properties of Flex-on-Board (FOB) interconncections. Solder ACF joints with the ultrasonic bonding method showed excellent solder wetting by broken solder oxide layers on solder surfaces compared with solder joints with remaining solder oxide layer bonded by the conventional thermo-compression (TC) bonding method. When higher target temperature was used, Sn58Bi solder joints showed concave shape due to lower degree of cure of resin at solder MP by higher heating rate. ACFs with epoxy resins and SAC305 solders showed lower degree of resin cure at solder MP due to the slow curing rate resulting in concave shaped solder joints. In terms of solder wetting area, solder ACFs with $25-32{\mu}m$ diameters and 30-40 wt% showed highest wetted solder areas. Solder ACF joints with the concave shape and the highest wetting area showed lower contact resistances and higher reliability in PCT results than conventional ACF joints. These results indicate that solder morphologies and wetting areas of solder ACF joints can be controlled by adjustment of bonding conditions and material properties of solder and polymer resin to improve reliability of ACF joints.

• Journal of the Microelectronics and Packaging Society
• /
• v.10 no.1
• /
• pp.31-38
• /
• 2003

In the current electronic technology atmosphere, MEMS (Microelectromechanical System) technology is regarded as one of promising device manufacturing technologies to realize market-demanding device properties. In the packaging of MEMS devices, the packaged structure must maintain hermeticity to protect the devices from a hostile atmosphere during their operations. For such MEMS device vacuum packaging, we introduce the LTCC (Low temperature Cofired Ceramic) packaging technology, in which embedded passive components such as resistors, capacitors and inductors can be realized inside the package. The technology has also the advantages of the shortened length of inner and surface traces, reduced signal delay time due to the multilayer structure and cost reduction by more simplified packaging processes owing to the realization of embedded passives which in turn enhances the electrical performance and increases the reliability of the packages. In this paper, the leakage rate of the LTCC package having several interfaces was measured and the possibility of LTCC technology application to MEMS devices vacuum packaging was investigated and it was verified that improved hermetic sealing can be achieved for various model structures having different types of interfaces (leak rate: stacked via; $4.1{\pm}1.11{\times}10^{-12}$/ Torrl/sec, LTCC/AgPd/solder/Cu-tube; $3.4{\pm}0.33{\times}10^{-12}$/ Torrl/sec). In real application of the LTCC technology, the technology can be successfully applied to the vacuum packaging of the Infrared Sensor Array and the images of light-up lamp through the sensor way in LTCC package structure was presented.

• Journal of the Microelectronics and Packaging Society
• /
• v.17 no.2
• /
• pp.35-40
• /
• 2010

The variations of dielectric properties of $Ta_2O_5-SiO_2$ continuous composition spread thin films prepared by off-axis radio-frequency magnetron sputtering were investigated. The dielectric maps of dielectric constant and loss were plotted via 1500 micron-step measuring. The specific points showing superior dielectric properties of high dielectric constant (k~19.5) and loss (tan${\delta}$<0.05) at 1 MHz were found in area of the distance of 16 mm and 22 mm apart from $SiO_2$ side in $75{\times}25mm^2$ sized Pt/Ti/$SiO_2$/Si(100) substrates.