• 한국IT서비스학회지
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• 제6권1호
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• pp.151-158
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• 2007

D-class computation requires multiplication of three Boolean matrices for each of all possible triples of $n{\times}n$ Boolean matrices and search for equivalent $n{\times}n$ Boolean matrices according to a specific equivalence relation. It is easy to see that even multiplying all $n{\times}n$ Boolean matrices with themselves shows exponential time complexity and D-Class computation was left an unsolved problem due to its computational complexity. The vector-based multiplication theory shows that the multiplication of three Boolean matrices for each of all possible triples of $n{\times}n$ Boolean matrices can be done much more efficiently. However, D-Class computation requires computation of equivalent classes in addition to the efficient multiplication. The paper discusses a theory and an algorithm for efficient D-class computation, and shows execution results of the algorithm.

• 정보처리학회논문지A
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• 제10A권4호
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• pp.347-356
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• 2003

DCT 알고리즘은 내적을 효율적으로 처리할 수 있는 하드웨어 구조가 필수적이다. 내적 연산을 위한 기존의 방법들은 하드웨어 복잡도가 높기 때문에, 이론 줄이기 위한 방법으로 연산 공유 승산기가 제안되었다. 하지만 기존의 연산 공유 승산기는 전처리기 및 선택기의 비효율적 구조로 인한 성능저하의 문제점을 가지고 있다. 본 논문에서는 새로운 연산 공유 승산기를 제안하고 이를 1차원 DCT 프로세서에 적용하여 구현하였다. 연산 공유 승산기의 구조 및 논리 합성 비교 시 새로운 승산기는 기존에 비해 효율적인 하드웨어 구성이 가능함을 확인하였고, 1차원 DCT 프로세서 설계 시 기존 구현 방식들에 비해 우수한 성능을 나타내었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.418-425
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• 2012

In this paper, efficient implementation of error correction code (ECC) processing circuits based on single error correction and double error detection (SEC-DED) code with check bit pre-computation is proposed for memories. During the write operation of memory, check bit pre-computation eliminates the overall bits computation required to detect a double error, thereby reducing the complexity of the ECC processing circuits. In order to implement the ECC processing circuits using the check bit pre-computation more efficiently, the proper SEC-DED codes are proposed. The H-matrix of the proposed SEC-DED code is the same as that of the odd-weight-column code during the write operation and is designed by replacing 0's with 1's at the last row of the H-matrix of the odd-weight-column code during the read operation. When compared with a conventional implementation utilizing the odd-weight- column code, the implementation based on the proposed SEC-DED code with check bit pre-computation achieves reductions in the number of gates, latency, and power consumption of the ECC processing circuits by up to 9.3%, 18.4%, and 14.1% for 64 data bits in a word.

• 한국정보컨버전스학회:학술대회논문집
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• 한국정보컨버전스학회 2008년도 International conference on information convergence
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• pp.145-150
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• 2008

This thesis explores the problem of reconstructing a three-dimensional(3D) scene given a set of images or image sequences of the scene. It describes efficient methods for the 3D reconstruction of static and dynamic scenes from stereo images, stereo image sequences, and images captured from multiple viewpoints. Novel methods for image-based and volumetric modelling approaches to 3D reconstruction are presented, with an emphasis on the development of efficient algorithm which produce high quality and accurate reconstructions. For image-based 3D reconstruction a novel energy minimisation scheme, Iterated Dynamic Programming, is presented for the efficient computation of strong local minima of discontinuity preserving energyy functions. Coupled with a novel morphological decomposition method and subregioning schemes for the efficient computation of a narrowband matching cost volume. the minimisation framework is applied to solve problems in stereo matching, stereo-temporal reconstruction, motion estimation, 2D image registration and 3D image registration. This thesis establishes Iterated Dynamic Programming as an efficient and effective energy minimisation scheme suitable for computer vision problems which involve finding correspondences across images. For 3D reconstruction from multiple view images with arbitrary camera placement, a novel volumetric modelling technique, Embedded Voxel Colouring, is presented that efficiently embeds all reconstructions of a 3D scene into a single output in a single scan of the volumetric space under exact visibility. An adaptive thresholding framework is also introduced for the computation of the optimal set of thresholds to obtain high quality 3D reconstructions. This thesis establishes the Embedded Voxel Colouring framework as a fast, efficient and effective method for 3D reconstruction from multiple view images.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 A
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• pp.68-70
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• 1996

In this paper, an efficient parallel computation method for solving large sparse systems of linear algebraic equations by using Cholesky's method in the finite element method is studied. The methods of minimizing the number of fill-ins in the factorization process of factorization are investigated for minimizing the amount of memory and computation time. The parallel programming is implemented under the PVM(Parallel Virtual Machine) environment. The method of load-distribution is studied for minimizing the computation time and the communication time.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권7호
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• pp.3648-3663
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• 2017

With the development of cloud computing and widespread availability of mobile devices, outsourcing computation has gotten more and more attention in cloud computing services. The computation of bilinear pairing is the most expensive operation in pair-based cryptographic schemes. Currently, most of the algorithms for outsourcing bilinear pairing have small checkability or the outsourcers need to operate expensive computations. In this paper, we propose an efficient algorithm for outsourcing bilinear pairing with two servers, where the outsourcers can detect the errors with a probability of 1 if the cloud servers are dishonest, and the outsourcers are not involved in any complex computations. Finally, the performance evaluation demonstrates that the proposed algorithm is most efficient in all of fully verifiable outsourcing algorithms for bilinear pairing.

• 한국정밀공학회지
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• 제12권9호
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• pp.137-147
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• 1995

The unbalance response analysis is one of the essential area in the forced vibration analysis of rotor-bearing systems. Local bearing parameters in rotor-bearing systems are the major sources which give rise to a difficulty in unbalance response computation due to the complicated dynamic properties such as rotational speed dependency and anisotropy. In the present paper, an efficient method for unbalance responses is proposed so as to easily take into account bearing parameters in computation. An exact matrix condensation procedure is proposed which enables the present method to compute unbalance responses by dealing with condensed, small matrices. The proposed method causes no errors even though the computation procedure is based on the small matrices condensed from the full matrices. The present method is illustrated through a numerical example and compared with the conventional method.

• Nuclear Engineering and Technology
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• 제46권5호
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• pp.641-654
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• 2014

A new computer code, named CORONA (Core Reliable Optimization and thermo-fluid Network Analysis), was developed for the core thermo-fluid analysis of a prismatic gas cooled reactor. The CORONA code is targeted for whole-core thermo-fluid analysis of a prismatic gas cooled reactor, with fast computation and reasonable accuracy. In order to achieve this target, the development of CORONA focused on (1) an efficient numerical method, (2) efficient grid generation, and (3) parallel computation. The key idea for the efficient numerical method of CORONA is to solve a three-dimensional solid heat conduction equation combined with one-dimensional fluid flow network equations. The typical difficulties in generating computational grids for a whole core analysis were overcome by using a basic unit cell concept. A fast calculation was finally achieved by a block-wise parallel computation method. The objective of the present paper is to summarize the motivation and strategy, numerical approaches, verification and validation, parallel computation, and perspective of the CORONA code.

• 한국산업정보학회논문지
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• 제12권2호
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• pp.68-78
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• 2007

D-클래스는 주어진 동치관계(equivalence relation)에 있는 $n{\times}n$ 불리언 행렬의 집합으로 정의된다. D-클래스 계산은 $n{\times}n$ 불리언 행렬의 전체 집합을 대상으로 이 집합에서 조합할 수 있는 모든 세 불리언 행렬 사이의 곱셈을 요구한다. 그러나 불리언 행렬에 대한 대부분의 연구는 단지 두 개의 불리언 행렬에 대한 효율적인 곱셈에 집중되었으며 모든 불리언 행렬 사이의 곱셈에 대한 연구는 최근에야 소수가 보이고 있다. 본 논문은 모든 세 개의 불리언 행렬 곱셈과 모든 D-클래스를 보다 효율적으로 계산할 수 있는 이론을 제시하고 이를 적용한 알고리즘과 실행결과에 대하여 논한다.

• Journal of Information Processing Systems
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• 제14권2호
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• pp.499-509
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• 2018

Recently, hybrid transactional memory (HyTM) has gained much interest from researchers because it combines the advantages of hardware transactional memory (HTM) and software transactional memory (STM). To provide the concurrency control of transactions, the existing HyTM-based studies use a bloom filter. However, they fail to overcome the typical false positive errors of a bloom filter. Though the existing studies use a global lock, the efficiency of global lock-based memory allocation is significantly low in multi-core environment. In this paper, we propose an efficient hybrid transactional memory scheme using near-optimal retry computation and sophisticated memory management in order to efficiently process transactions in multi-core environment. First, we propose a near-optimal retry computation algorithm that provides an efficient HTM configuration using machine learning algorithms, according to the characteristic of a given workload. Second, we provide an efficient concurrency control for transactions in different environments by using a sophisticated bloom filter. Third, we propose a memory management scheme being optimized for the CPU cache line, in order to provide a fast transaction processing. Finally, it is shown from our performance evaluation that our HyTM scheme achieves up to 2.5 times better performance by using the Stanford transactional applications for multi-processing (STAMP) benchmarks than the state-of-the-art algorithms.