• Journal of the Semiconductor & Display Technology
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• v.5 no.1 s.14
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• pp.33-38
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• 2006

The ATE driver to test a high speed semiconductor chip is designed by using general logic drivers instead of dedicated pin drivers. We have proposed a structure of general logic drivers using FPCA and assured its correct operation by EDA tool simulation. PCB circuit was implemented and Altera FPGA chip was programmed using DDR I/O library. On the PCB, it is necessary to place two resistors connected output drivers near to the output pin to adjust an impedance matching. We confirmed that the measured results agree with the simulated values within 5% errors at room temperature for the input signals with 800Mbps data transfer rate and 1.8V operating voltage.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2000.04a
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• pp.561-566
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• 2000

A screw driver is essentially used in assembling machine parts and electronic products such as the printed circuit board with a housing. As the parts to be assembled becomes small and precise, the higher precision of the controling screw driver torque is required. However, because the operator controls the fastening torque by his experience, it must be inexact. Thus the screw driver which can exactly control the fastening torque by a bellows is designed and developed in the study. The bellows is expanded by the inner air pressure and contracted and by the spring operation. The bellows driver is composed of the entrance solenoid valve, the exit solenoid valve and the pressure sensor. The pressure sensor senses the bellows pressure. When the pressure sensor output reaches the setting value, it operates the exit solenoid valve not to deliver further torque by letting the air of the bellows out. Through a series of experiments, the performance is studied and verified.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.7
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• pp.4489-4493
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• 2014

LED light driving device has problems in efficiency and heating at higher than 150W. In addition, there is inconvenience in replacing the lighting device to another when W is not the same as the previous one. In this paper, a multi-channel LED light driver, driver embedded driver circuit in a multi-channel structure with a power system in the driver-interlocking structure was designed. With the auto control converter structure with a power efficiency above 93% and power factor above 0.98, the weight of the high efficiency LED lighting-actuating device in driver-interlocking structure, a driver in self-calibrating self-optimization structure. In this paper, at below 10% THD, the existing converter contrast weight was reduced by 40% or more.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.4 s.334
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• pp.53-60
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• 2005

This work Proposes and describes an LCD backlight driver IC using a voltage feedback circuit which improves the brightness uniformity. The proposed circuit controls the brightness of a backlight by amplifying of sampling voltage at a lamp. To keep the uniformity of brightness, the circuit has a reference lamp. The output voltage of the reference lamp is supplied commonly to each lamp that reduces a resistance deviation of the lamps. As a result, the proposed circuit shows brightness uniformity improvement of about $40\%$ compared to the conventional ones.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1661-1668
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• 2016

A fixed off-time controlled high power factor ac-dc LED driver is proposed in this paper, which employs a novel zero-crossing-compensation (ZCC) circuit based on a fixed off-time controlled scheme. Due to the parasitic parameters of the system, the practical waveforms have a dead region. By detecting the zero-crossing boundary, the proposed ZCC circuit compensates the control signal VCOMP within the dead region, and is invalid above this region. With further optimization of the parameters KR and Kτ of the ZCC circuit, the dead zone can be eliminated and lower THD is achieved. Finally, the chip is implemented in HHNEC 0.5μm 5V/40V HVCMOS process, and a prototype circuit, delivering 7~12W of power to several 3-W LED loads, is tested under AC input voltage ranging from 85V to 265V. The test results indicate that the average total harmonic distortion (THD) of the entire system is approximately 10%, with a minimum of 5.5%, and that the power factor is above 0.955, with a maximum of 0.999.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.58-65
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• 2009

In this paper, we designed high voltage gate drive IC including dead time circuit in which capacitors controlled rising time and falling time, and schimitt-triggers controlled switching voltage. Designed High voltage gate drive IC improves an efficiency of half-bridge converter by decreasing dead time variation against temperature and has variable dead time by the capacitor value. and its power dissipation, which is generated on high side part level shifter, has decreased 52 percent by short pulse generation circuit, and UVLO circuit is designed to prevent false-operation. We simulated by using Spectre of Cadence to verify the proposed circuit and fabricated in a 1.0um process.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.242-245
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• 2007

To improve the efficiency of PDP TV, it should minimize the power losses transpired during AC-to-DC power conversion and PDP driving process. Generally the input power supply for PDP driving employes a two-stage power factor corrected converter, and it independently consists of sustain driver, which has high power consumption. However, such a circuit configuration has a difficulty for the PDP market requires low cost. To alleviate this problem, a new circuit composition is presented. It integrates input power supply with sustain driver in a single power stack. The input power supply of the proposed circuit has a single-stage structure to minimize power conversion loss, and it directly supplies power to the sustain driver so as to reduce the system size and cost.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.183-184
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• 2000

A new driving circuit for scan electrode in AC PDP has been developed. The number of scan driver switches can be reduced to one half of the conventional circuit. Capacitance between the electrodes is utilized. Experiments and analysis of the new structure has been carried out to confirm its robustness.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.226-227
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• 2016

본 논문은 SiC Mosfet Gate Driver에서 Overcurrent상황 발생시 Mosfet 양단의 전압을 검출함으로써 스위칭 소자를 보호하는 Desaturation detction circuit에 대해 다룬다. IGBT와 다르게 SiC Mosfet의 경우 ohmic 영역과 saturation영역의 구분이 명확하지 않기 때문에 과전류 발생시 Mosfet 양단 전압을 검출하는데 어려움이 있다. 따라서 이를 보완하기 위하여 Mosfet drain측에 새로운 회로를 추가로 설계함으로써 이를 보완하여 효과적으로 양단전압을 검출한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.1-6
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• 2005

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for LCD driver IC. In the proposed circuit, we apply a couple of primitive data to DLVDS circuit as inputs. The transmitter converts two inputs to two kinds of fully differential level signals. In this circuit, two transmission lines are sufficient to transfer two primitive inputs while keeping the LVDS feature. The receiver recovers The original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25\mu m$ CMOS technology. The resultant circuit shows 1-Gbps/2-line data rate and 35-mW power consumption at 2.5V supply voltage, respectively.