• The Transactions of the Korean Institute of Electrical Engineers
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• v.36 no.6
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• pp.437-443
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• 1987

Due to the recent development of microprocessor, the digital control is now in use for the practical structure of the control systems, but it leaves the problem of controlling delays caused by computation time when it is applied to the realization problems, such as application method of the control law and controlling effect of continuous control, etc. This paper deals with robust stability of the digital regulator which compensates for the controlling delays by applying prediction values of state.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.9
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• pp.937-944
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• 1991

In digital controller design, the delays in the controller should be taken into consideration when the computation time of the processor is not negligibale compared with sampling time. Recently, Mita has proposed a digital optimal servosystem taking account of the delays in the controller. In this paper, robust stability and diturbance rejection properties of this optimal servosystej are analyzed in the frequency-domain. The well-known asymptotic properties of the optimal regulators with respect to the weighting matrices of the cost functions are successfully utilized to show that the influence of the delays in the controller are drastic for certain choice of the cost function Illustrative numerical examples are presented.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.336-340
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• 2001

In a digital system, there are inevitable delays in calculations and applying the inverter output voltages to the motor terminals. Because of the delays, the conventional predictive current controller implemented in the digital system has large overshoot and large harmonics. A new predictive current controller, considering the delays, for a permanent magnet synchronous motor (PMSM) is presented. The effectiveness and feasibilities are shown by experimental results.

• Journal of Power Electronics
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• v.12 no.1
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• pp.98-103
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• 2012

This paper presents a digital pulse width modulator (DPWM) with a reduced digital modulation delay (a transport delay of the modulator) during the transient response of power converters. During the transient response operation of a power converter, as a result of dynamic variations such as load step-up or step-down, the closed loop controller will continuously adjust the duty cycle in order to regulate the output voltage. The larger the modulation delays, the larger the undesired output voltage deviation from the reference point. The three conventional DPWM techniques exhibit significant leading-edge and/or trailing-edge modulation delays. The DPWM technique proposed in this paper, which results in modulation delay reductions, is discussed, experimentally tested and compared with conventional modulation techniques.

• International Journal of Internet, Broadcasting and Communication
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• v.4 no.2
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• pp.1-6
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• 2012

Control Theory for continuous-time system has been well developed. Due to the development of computer technology, digital control scheme are employed in many areas. When delays are in control systems, it is hard to control the system efficiently. Delays by controller-to-actuator and sensor-to-controller deteriorate control performance and could possibly destabilize the overall system. In this paper, a new approximated discretization method and digital design for control systems with multiple state, input and output delays and a generalized bilinear transformation method with a tunable parameter are also provided, which can re-transform the integer time-delayed discrete-time model to its continuous-time model. Illustrative examples are given to demonstrate the effectiveness of the developed method.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.348-353
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• 2003

This paper considers the optimal control problem in real-time control systems with random time-delays. It proposes an algorithm which uses the linear quadratic (LQ) control method and a dedicated technique to compensate for the time-delay effects. Since it is assumed that the time-delays are unknown but the probability distribution of the delays are known a priori, the algorithm considers the mean value of the time-delays as a nominal value for random delay compensation. An example is given to show the performance of the proposed algorithm, where an inverted pendulum system is controlled over a controller-area network (CAN). Simulation results show that the proposed algorithm provides good performance results. It is shown that our algorithm is comparable to existing algorithms in both computation cost and performance.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.2
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• pp.601-617
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• 2014

In digital radio broadcasting systems, long delays are incurred in service start time when tuning to a particular frequency because several synchronization steps, such as symbol timing synchronization, frame synchronization, and carrier frequency offset and sampling frequency offset compensation are necessary. Therefore, the operation of the synchronization blocks causes delays ranging from several hundred milliseconds to a few seconds until the start of the radio service after frequency tuning. Furthermore, if spectrum inversed signals are transmitted in digital radio broadcasting systems, the receivers are unable to decode them, even though most receivers can demodulate the spectral inversed signals in analog radio broadcasting systems. Accordingly, fast synchronization techniques and a method for spectral inversion detection are required in digital radio broadcasting systems that are to replace the analog radio systems. This paper presents a joint detection method of frame, integer carrier frequency offset, and spectrum inversion for DRM Plus digital broadcasting systems. The proposed scheme can detect the frame and determine whether the signal is normal or spectral inversed without any carrier frequency offset and sampling frequency offset compensation, enabling fast frame synchronization. The proposed method shows outstanding performance in environments where symbol timing offsets and sampling frequency offsets exist.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.211-216
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• 2012

Control Theory for continuous-time system has been well developed. Due to the development of computer technology, digital control scheme are employed in many areas. When delays are in control systems, it is hard to control the system efficiently. Delays by controller-to-actuator and sensor-to-controller deteriorate control performance and could possibly destabilize the overall system. In this paper, a new approximated discretization method and digital design for control systems with multiple state, input and output delays and a generalized bilinear transformation method with a tunable parameter are also provided, which can re-transform the integer time-delayed discrete-time model to its continuous-time model. Illustrative example is given to demonstrate the effectiveness of the developed method.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.2
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• pp.167-174
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• 2015

This study describes how digital time delay deteriorates control performance in zero voltage switching (ZVS) phase-shifted full bridge (PSFB) converter. The small-signal model of the ZVS PSFB converter is derived from the buck-converter small-signal model. Digital time delay effects have been considered according to the digital sampling methods. The analysis verifies that digital time delays reduce the stability margin of the converter, and the double sampling technique exhibits better performance than the single sampling technique. Both simulation and experimental results based on 250 W ZVS PSFB confirm the validity of the analyses performed in the study.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.4
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• pp.39-46
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• 2009

In this paper, we propose a full digital capacitive sensing touch key reducing the effects due to the variations of resistance and clock frequency. The proposed circuit consists of two capacitive loads to measure and a resistor between the capacitive loads. The method measures the delays of the resistor and two capacitive loads, respectively. The ratio of the two delays is represented as the ratio of the two capacitive loads and is irrelative to the resistance and the clock frequency if quantization error is disregarded. Experimental results show the proposed scheme efficiently reduces the effects due to the variations of clock frequency and resistance. Further more the method has l.04[pF] resolution and can be used as a touch key.