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http://dx.doi.org/10.5207/JIEIE.2009.23.4.039

A Design of Full Digital Capacitive Sensing Touch Key Reducing The Effects Due to The Variations of Resistance and Clock Frequency  

Seong, Kwong-Su (영남대학교 전자정보공학부)
Publication Information
Journal of the Korean Institute of Illuminating and Electrical Installation Engineers / v.23, no.4, 2009 , pp. 39-46 More about this Journal
Abstract
In this paper, we propose a full digital capacitive sensing touch key reducing the effects due to the variations of resistance and clock frequency. The proposed circuit consists of two capacitive loads to measure and a resistor between the capacitive loads. The method measures the delays of the resistor and two capacitive loads, respectively. The ratio of the two delays is represented as the ratio of the two capacitive loads and is irrelative to the resistance and the clock frequency if quantization error is disregarded. Experimental results show the proposed scheme efficiently reduces the effects due to the variations of clock frequency and resistance. Further more the method has l.04[pF] resolution and can be used as a touch key.
Keywords
Capacitive Sensor; Touch Key;
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