• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.6B
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• pp.325-333
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• 2007

An OS requires the device driver to control hardware IPs at application level. Development of a device driver requires specific acknowledge for target hardware and OS. In this paper, we present a system which generates a device driver together with an interface circuit. In the proposed system, an efficient device driver is generated by selecting a basic device driver skeleton, a function module code, and a header file table from the pre-constructed library and an interface circuit is constructed such that the generated device driver operates correctly. The proposed system is evaluated by generating a TFT-LCD device driver on the ARM922T core with 3.5 inch Samsung TFT-LCD in ARM-Linux environment. Experiment result shows that the writing time on the LCD is decreased by 1.12% and the compiled code size is increased by 0.17% compared to the manually generated one. The automatically generated device driver has no performance degradation in the latency of hardware control at the application program level. The system development time can be reduced using the proposed device driver generation system.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.7-7
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• 2009

In this paper, we investigated the dependence of HCI (Hot Carrier Immunity) degradation and device performance on channel orientation in sub-micron PMOSFET. Although device performance ($I_{D.sat}$ vs. $I_{Off}$) was improved as the transistor angle increased HC immunity was degraded. Therefore, consideration of reliability characteristics as well as dc device performance is highly necessary in channel stress engineering of next generation CMOSFETs.

• Proceedings of the KIEE Conference
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• 2007.11c
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• pp.165-169
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• 2007

Organic EL has been expected to adopt to a new styles of technology that make flat display after Tang & Vanslyke made food electric luminescence device in late 1980s. Their studies based on multi layer structure that consists of emitting layer and carrier transporting layer using proper organic material. In this study we made multi layer device using $Eu(TTA)_3(phen)$ as a luminescence material by PVD and investigate luminous properties of each device. But oxidization of organic layer by ITO, energy walls in both pole interface, contaminations of ITO surface, importance of protecting membrane, diffusive dimming of light to cathode organic layer, these causes of degradations are common facts of a macromolecule and micromolecule. We think these degradation caused by the impact of heat and electro-chemical factor, bulk effect and interface phenomenon, and raise a question.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1775-1778
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• 2006

Through baking process on an interlayer, known as hole transporting layer, varying baking temperature up to 300 degree, which is considered as extremely high for polymer light emitting device (PLED) system, we found interesting relationship between packing density and morphology affecting device performance. Granular morphology shows that as temperature increases, grain size is getting smaller to pack closely and make interlayer harden. Such denser interlayer has temperature dependency of its own mobility, even without clear evidence of degradation of material itself. Its fact proven in a single film also reflects on multilayered PLED's performance like IVL, efficiency, lifetime. It's found that, especially, to enhance lifetime is related with thermal stability of interlayer and its mobility dependency to meet better charge balance. Therefore, it gives us understanding not only baking effect of interlayer, but also material & device designing guide to enhance lifetime.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1213-1216
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• 2003

This paper proposes an 3D graphics rendering processor for portable device. One the most important factor is chip size for portable device, but the conventional 3D graphics rendering processor is not a suitable because the processor needs a lot of multiplication and division units. So the proposed architecture substitutes single precision floating point by 32 bit fixed point, and uses recursive units for the same operation such as color values(z, r, g, b, a) and texture values (s, t, u, v). In this approach, we reduce numbers of multiplications and divisions by 66.1% and 75% respectively at the sacrifice of performance degradation by 2.12%.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1065-1068
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• 2003

For the first time, high quality ultra-thin strained Si/SiGe on Insulator (SGOI) substrate with total SGOI thickness( $T_{Si}$ + $T_{SiGe}$) of 13 nm is developed to combine the device benefits of strained silicon and SOI. In the case of 6- 10 nm-thick top silicon, 100-110 % $I_{d,sat}$ and electron mobility increase are shown in long channel nFET devices. However, 20-30% reduction of $I_{d,sat}$ and electron mobility are observed with 3 nm top silicon for the same long channel device. These results clearly show that the FETs operates with higher performance due to the strain enhancement from the insertion of SiGe layer between the top silicon layer and the buried oxide(BOX) layer. The performance degradation of the extremely thin( 3 nm ) top Si device can be attributed to the scattering of the majority carriers at the interfaces.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.918-921
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• 1999

The breakdown voltage in fully depleted SOI N-MOSFET’s have been studied over a wide range of film thicknesses, channel doping, and channel lengths. An asynmmetric Source/Drain SOI technology is proposed, which having the advantages of Normal LDD SOI(Silicon-On-Insulator) for breakdown voltage and gives a high drivability of LDD SOI without sacrificings hot carrier immunity The two-dimensional simulations have been used to investigate the breakdown behavior in these device. It is found that the breakdown voltage(BVds) is almost same with high current drivability as that in Normal LDD SOI device structure.

• Nuclear Engineering and Technology
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• v.33 no.5
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• pp.514-525
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• 2001

Optimum characteristics of digital X-ray sensor components were analyzed to develop intra- oral dental digital X-ray image sensor using indirect method. Parametric analysis was carried out to optimize the phosphor thickness and the fiber optic plate (FOP) coupling to charge coupled device (CCD). X-ray absorption and light diffusion in the phosphor layer were analyzed by the Monte Carlo method. Real time X-ray image was obtained with prototype X- ray image sensor using general CCD camera with 1∼10 Ip/mm resolution. It has been previously shown that large resolution degradation in X-ray images was caused by miss alignment of FOP to CCD and optical adhesive selection. In this study, we reported that X-ray image quality was greatly improved by using optimized characteristics of alignment device and phosphor thickness.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.89-95
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• 1996

In this ppaer, temeprature dependent transport and heat transport models have been incorperated to the two dimensional device simulator SNU-2D provides a solid bse for nonisothermal device simulation. As an example to study the nonisothermal problem. we consider SOI MOSFET's I-V characteristics have been simulated and compared with the measurements. It is shown that negative slopes in the Ids-Vds characteristics are casused by the temperature dependence of the saturation velocity and the degradation of the temperature dependence mobility. Also it is shown that the kink effect occurs when impact ionization near the drain produces a buildup of holes in this isolated device island, and the hysteresis is caused by the creation of holes in the channel and their flow to the source.

• Proceedings of the KIEE Conference
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• 2005.10a
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• pp.82-85
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• 2005

Organic EL has been expected to adopt to a new styles of technology that make flat display after Tang & Vanslyke made good electric luminescence device in late 1980s. Their studies based on multi layer structure that consists of emitting layer and carrier transporting layer using proper organic material. In this study, we made multi layer device using $Eu(TTA)_3(phen)$ as a luminescence material by PVD and investigate luminous properties of each device. But oxidization of organic layer by ITO, energy walls in both pole interface, contaminations of ITO surface, importance of protecting membrane, diffusive dimming of light to cathode organic layer, these causes of degradations are common facts of a macromolecule and micromolecule. We think these degradation caused by the impact of heat and electro-chemical factor, bulk effect and interface phenomenon, and raise a question.