• Title/Summary/Keyword: deposited layer

Search Result 2,397, Processing Time 0.025 seconds

Electrical Properties of CuInS$_2$Ratio (Cu/In 성분비에 따른 CuInS$_2$박막의 전기적 특성)

  • Park, Gye-Choon;Jeong, Woo-Seong;Chang, Young-Hak;Lee, Jin;Jeong, Hae-Duck
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1995.11a
    • /
    • pp.109-112
    • /
    • 1995
  • CuInS$_2$thin film was prepared by heat treatment at vacuum 10$\^$-3/ Torr of S/In/Cu stacked layer which was deposited by sequential. And so, the polycrystalline CuInS$_2$with chalcopyrite structure was well made at heat treatment temperature of 250$^{\circ}C$ and heat treatment time of 60 min. Single phase of CuInS$_2$was formed from Cu/In composition ratio of 0.84 to 1.3. p conduction type of CuInS$_2$thin film was appeared from Cu/In competition ratio of 0.99. The highest resistivity of CuInS$_2$with p type was 1.608${\times}$10$^2$$\Omega$cm at Cu/In composition ratio of 0.99 and The lowest resistivity was 5.587${\times}$10$\^$-2/$\Omega$cm at Cu/In composition ratio of 1.3.

  • PDF

Effect of RTA on the interfacial Properties of Top Electrodes on $(Ba_{0.5}Sr_{0.5})TiO_3$ ($(Ba_{0.5}Sr_{0.5})TiO_3$ 박막의 상부전극 RTA에 따른 계면 특성 변화)

  • Jeon, Jang-Bae;Kim, Dyeok-Kyu;So, Soon-Jin;Park, Choon-Bae
    • Proceedings of the KIEE Conference
    • /
    • 1998.11c
    • /
    • pp.740-742
    • /
    • 1998
  • In this paper, we described the effect of rapid thermal annealing on the electrical properties of interfacial layer between various top electrodes and $(Ba_{0.5}Sr_{0.5})TiO_3$ thin films. BST thin films were fabricated on Pt/TiN/$SiO_2$/Si substrate by RF magnetron sputtering technique. AI, Ag, and Cu films for the formation of top electrode were deposited on BST thin films by thermal evaporator. Top electrodes/BST/Pt capacitor annealed with rapid thermal annealing at various temperature. In $(Ba_{0.5}Sr_{0.5})TiO_3$ thin films with Cu top electrode annealed at $500^{\circ}C$, the dielectric constant was measured to the value of 366 at 1.2 [kHz] and the leakage current was obtained to the value of $5.85{\times}10^{-7}\;[A/cm^2}$ at the forward bias of 2 [V].

  • PDF

Properties of ITO/Cu/ITO Multilayer Films for Application as Low Resistance Transparent Electrodes

  • Kim, Dae-Il
    • Transactions on Electrical and Electronic Materials
    • /
    • v.10 no.5
    • /
    • pp.165-168
    • /
    • 2009
  • Transparent and conducting ITO/Cu/ITO multilayered films were deposited by magnetron sputtering on unheated polycarbonate (PC) substrates. The thickness of the Cu intermediate film was varied from 5 to 20 nm. Changes in the microstructure and optoelectrical properties of ITO/Cu/ITO films were investigated with respect to the thickness of the Cu intermediated layer. The optoelectrical properties of the films were significantly influenced by the thickness of the Cu interlayer. The sandwich structure of ITO 50 nm/Cu 5 nm/ITO 45 nm films had a sheet resistance of $36{\Omega}$/Sq. and an optical transmittance of 67% (contain substrate) at a wavelength of 550 nm, while the ITO 50 nm/Cu 20 nm/ITO 30 nm films had a sheet resistance of $70{\Omega}$/Sq. and an optical transmittance of 36%. The electrical and optical properties of ITO/Cu/ITO films were determined mainly by the Cu film properties. From the figure of merit, it is concluded that the ITO/Cu/ITO films with a 5 nm Cu interlayer showed the better performance in transparent conducting electrode applications than the conventional ITO films.

Characteristics of poly-Si TFTs using Excimer Laser Annealing Crystallization and high-k Gate Dielectrics (Excimer Laser Annealing 결정화 방법 및 고유전 게이트 절연막을 사용한 poly-Si TFT의 특성)

  • Lee, Woo-Hyun;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.21 no.1
    • /
    • pp.1-4
    • /
    • 2008
  • The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

Electrical and Physical Characteristics of Nickel Silicide using Rare-Earth Metals (희토류 금속을 이용한 니켈 실리사이드의 전기 및 물리적 특성)

  • Lee, Won-Jae;Kim, Do-Woo;Kim, Yong-Jin;Jung, Soon-Yen;Wang, Jin-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.21 no.1
    • /
    • pp.29-34
    • /
    • 2008
  • In this paper, we investigated electrical and physical characteristics of nickel silicide using rare-earth metals(Er, Yb, Tb, Dy), Incorporated Ytterbium into Ni-silicide is proposed to reduce work function of Ni-silicide for nickel silicided schottky barrier diode (Ni-silicided SBD). Nickel silicide makes ohmic-contact or low schottky barrier height with p-type silicon because of similar work function (${\phi}_M$) in comparison with p-type silicon. However, high schottky barrier height is formed between Ni-silicide and p-type substrate by depositing thin ytterbium layer prior to Ni deposition. Even though the ytterbium is deposited below nickel, ternary phase $Yb_xN_{1-x}iSi$ is formed at the top and inner region of Ni-silicide, which is believed to result in reduction of work function about 0.15 - 0.38 eV.

Fabrication and Characterization of Step-Edge Josephson Junctions on R-plane Al$_2O_3$ Substrates (R-면 사파이어 기판 위에 제작된 계단형 모서리 조셉슨 접합의 특성)

  • Lim, Hae-Ryong;Kim, In-Seon;Kim, Dong-Ho;Park, Yong-Ki;Park, Jong-Chul
    • 한국초전도학회:학술대회논문집
    • /
    • v.9
    • /
    • pp.147-151
    • /
    • 1999
  • YBCO step-edge Josephson junction were fabricated on sapphire substrates. The steps were formed on R-plane sapphire substrates by using Ar ion milling with PR masks. The step angle was controlled in the wide range from 25$^{\circ}$ to 50$^{\circ}$ by adjusting both the Ar ion incident angle and the photoresist mask rotation angle relative to the incident Ar ion beam. CeO$_2$ buffer layer and in-situ YBa$_2Cu_3O_{7-{\delta}}$ (YBCO) thin films was deposited on the stepped R-plane sapphire substrates by pulsed laser deposition method. The YBCO film thickness was varied to obtain the ratio of film thickness to step height in the range from 0.5 to 1. The step edge junction exhibited RSJ-like behaviors with I$_cR_n$ product of 100 ${\sim}$ 300 ${\mu}$V, critical current density of 10$^3$ ${\sim}$ 10$^5$ A/ cm$^2$ at 77 K.

  • PDF

Quench Characteristics of Resistive Superconducting Fault Current Limiters (저항형 초전도 한류소자의 퀜치 특성)

  • Kim, Hye-Rim;Hyun, Ok-Bae;Choi, Hyo-Sang;Hwang, Si-Dole;Kim, Sang-Joon
    • 한국초전도학회:학술대회논문집
    • /
    • v.9
    • /
    • pp.214-217
    • /
    • 1999
  • We investigated the quench characteristics of meander line type resistive superconducting fault current limiters based on YBCO thin films grown on 2" diameter LaAlO$_3$ substrates. A gold layer was deposited onto the 0.4 ${\mu}$ m thick YBCO film to disperse the heat generated at hot spots, prior to patterning into 1 mm wide meander lines by photolithography. The limiters were tested with simulated fault currents of various amplitudes. The quench started at 10 A and was completed within 1 msec at the fault current of 65 A$_{peak}$. The dynamic quench characteristics were explained based on the heat conduction within the film and the heat transfer between the film and the surrounding liquid nitrogen. The heat transfer coefficient per unit area was estimated to be 3.0 W/cm$^2$K.

  • PDF

Fabrication of Ni substrates with [001]-axes tilted textures for depostion of YBCO superconductor (YBCO 초전도체 증착을 위한 [001]-축이 기울어진 Ni 기판의 제작)

  • Kim, Ho-Sup;Lee, Jae-Seoung;Youm, Do-Jun
    • 한국초전도학회:학술대회논문집
    • /
    • v.9
    • /
    • pp.95-98
    • /
    • 1999
  • The crystalline alignment of Ni substrates textured by RABiTS have a probability distribution in the surface plane. This makes it difficult to obtain a high quality of textures over all the range of a long Ni tape. In order to improve the textures of Ni tape, we have investigated a new method of texturing. We obtained non-cube textured Ni tapes by rolling and annealing a high purity Ni. In these tapes, the [001]-axes were tilted around the rolling direction, and the [100]-axes were parallel to the rolling direction. The average grain size was several cm$^2$. We deposited buffer layer (CeO$^2$/YSZ/CeO$^2$) and YBCO on those tapes. We found out that a YBCO film with grows normal with respect to the surface and this feature is independent of the tilting angles of the Ni [001]-axes.

  • PDF

Proximity Effect in Nb/Gd Layers

  • Jung, Dong-Ho;Char, K.
    • Progress in Superconductivity
    • /
    • v.12 no.2
    • /
    • pp.110-113
    • /
    • 2011
  • We have grown a Nb/Gd bilayer on a$SiO_2$/Si substrate by using a DC magnetron sputtering system, which was fabricated in situ with silicon stencil masks. In order to investigate proximity effect of the Nb/Gd bilayer, we used a planar tunnel junction with an AlOx tunnel barrier by oxidizing the Al ground electrode at the bottom. A $Co_{60}Fe_{40}$ backing of Al was deposited so as to reduce the superconductivity of the Al, ensuring a normal counterelectrode. With a 50-nm-thick Nb layer, we have measured dI/dV (dynamic conductance) by varying the thickness of Gd, which can reveal the density of states (DOS) of the Nb/Gd bilayer as a function of the Gd thickness resulting from the proximity effect of a superconductor/ferromagnet bilayer (S/F). The SF proximity effect in Nb/Gd will be discussed in comparison to our previous results of the CoFe/Nb, Ni/Nb and CuNi/Nb proximity effect; Gd is expected to show different effects since Gd has f-electrons, while CoFe, Ni, and CuNi have only d-electrons. Our studies will focus on the triplet correlation in a superconducting pair.

Effects of Ti-capping Layers on the Thermal Stability of NiSi (Ti-capping층이 NiSi의 열적안정성에 미치는 영향)

  • Park, Soo-Jin;Lee, Keun-Woo;Kim, Ju-Youn;Jun, Hyung-Tak;Bae, Kyoo-Sik
    • Korean Journal of Materials Research
    • /
    • v.13 no.7
    • /
    • pp.460-464
    • /
    • 2003
  • Ni and Ti films were deposited by the thermal evaporator, and then annealed in the N$_2$ ambient at 300-80$0^{\circ}C$ in a RTA(rapid thermal annealing) system. Four point probe, AEM, FESEM, AES, and XPS were used to study the effects of Ti-capping layers on the thermal stability of NiSi thin films. The Ti-capped NiSi was stable up to $700^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after $600^{\circ}C$. These results were due to that the Ni in-diffusion and Si out-diffusion were retarded by the capping layer, resulting in the suppression of the formation of NiSi$_2$and Si grains at the surface.