• 한국재료학회:학술대회논문집
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• 한국재료학회 1995년도 추계 학술발표 강연 및 논문개요집
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• pp.11-12
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• 1995

• 한국진공학회:학술대회논문집
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• 한국진공학회 2004년도 제27회 학술발표회 초록집
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• pp.144-145
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• 2004

• 한국진공학회지
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• 제19권3호
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• pp.199-205
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• 2010

수열합성법(hydrothermal) 방식으로 성장한 ZnO 기판에 고에너지의 전자빔을 조사시킨 후 쇼트키(Schottky)다이오드를 제작하여 결함상태와 전기적 특성 변화를 조사하였다. 1 MeV 및 2 MeV 전자빔으로 $1{\times}10^{16}$ electrons/$cm^2$ dose로 기판의 Zn 면에 조사하였다. 1 MeV 전자빔이 조사된 시료에서는 표면에 전자빔 유도결함을 형성시켜 누설전류를 증가시켰고, 2 MeV 전자빔의 경우는 오히려 다이오드 누설절류 감소와 on/off 특성을 향상시키는 것으로 나타났다. 이들 시료에 대한 DLTS (deep level transient spectroscopy) 측정결과 전자빔 조사에 따른 전기적 물성변화는 활성화에너지와 포획단면적이 각각 $E_c$-0.33 eV 및 $2.97{\times}10^{15}\;cm^{-2}$인 O-vacancy가 주된 연관성을 보였으며, 활성화에너지 $E_v$+0.8 eV인 결함상태도 새롭게 완성되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2003년도 제25회 학술발표회 초록집
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• pp.129-129
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• 2003

• 한국재료학회지
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• 제9권5호
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• pp.460-466
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• 1999

The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

• 대한전자공학회논문지
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• 제23권1호
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• pp.120-125
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• 1986

Data analysis methods in lock-in amplifier based DLTS systems were discussed with regards to the signal-to-noise ratio and improvement of resolution of DLTS spectrum. The DLTS system based on wideband two-phase lock-in amplifier is shown to be the most preferabe for the studies in deep levels of low concentration. A single-temperature scanning DLTS methods in lock-in amplifier based system with the improved sensitivity is proposed. The method is tested on the characterization of deep levels in n-GaAs.

• 반도체디스플레이기술학회지
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• 제21권2호
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• pp.123-126
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• 2022

We investigated deep levels in n-type 4H-SiC epitaxy layer of the Positive-Intrinsic-Negative diode and Schottky barrier diodes by using deep level transient spectroscopy. Despite the excellent performance of 4H-SiC, research on various deep level defects still requires a lot of research to improve device performance. In Positive-Intrinsic-Negative diode, two defects of 196K and 628K are observed more than Schottky barrier diode. This is related to the action of impurity atoms infiltrating or occupying the 4H-SiC lattice in the ion implantation process. The I-V characteristics of the Positive-Intrinsic-Negative diode shows about ~100 times lower the leakage current level than Schottky barrier diode due to the grid structures in Positive-Intrinsic-Negative. As a result of comparing the capacitance of devices diode and Schottky barrier diode devices, it can be seen that the capacitance value lowered if it exists the P implantation regions from C-V characteristics.

• Macromolecular Research
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• 제10권2호
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• pp.75-79
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• 2002

Organic materials have considerable attention as active semiconductors for device applications such as thin-film transistors (TFTs) and diodes. Pentacene is a p-type organic semiconducting material investigated for TFTs. In this paper, we reported the morphological and electrical characteristics of pentacene TFT films. The pentacene transistors showed the mobility of 0.8 $\textrm{cm}^2$/Vs and the grains larger than 1 ${\mu}{\textrm}{m}$. Deep-level transient spectroscopy (DLTS) measurements were carried out on metal/insulator/organic semiconductor structure devices that had a depletion region at the insulator/organic-semiconductor interface. The duration of the capacitance transient in DLTS signals was several ten of seconds in the pentacene, which was longer than that of inorganic semiconductors such as Si. Based on the DLTS characteristics, the energy levels of hole and electron traps for the pentacene films were approximately 0.24, 1.08, and 0.31 eV above Ev, and 0.69 eV below Ec.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 추계학술대회 논문집 학회본부
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• pp.83-86
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• 1989

Electrical conductivity, I - V and DLTS have been measured on polycrystalline samples of $\alpha-Fe_{2}O_{3}$ containing small deviation from stoichiometry and small amounts of added titanium. DLTS (Deep Level Transient Spectroscopy) in the current transient mode has been applied to the measurement of the trap density at the grain boundary. Titanium enters the $\alpha-Fe_{2}O_{3}$ lattice substitutionally as $Ti^{4+}$, thus producing an $Fe^{2+}$ and maintaining the average charge per cation at three. The $Fe^{2+}$acts as a donor center with respect to the surrounding $Fe^{3+}$ions.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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• pp.81-81
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• 1999

고에너지 이온 주입에 의해 형성되는 결함의 거동을 DLTS(deep level transient spectroscopy)를 통해 조사하였다. 이온 주입에 이용된 기판들은 서로 다른 산소 농도를 가지고 있었으며, B 이온의 주입 농도는 각각 5X10E13 ~ 4X10E14으로 주입 에너지는 1.5MeV였다. 이온 주입에 의해 형성된 buried layer 내의 boron의 농도는 SIMS(secondary ion mass spectroscopy)를 이용하여 측정하였으며, 열처리에 따른 이차 결함의 생성은 TEM(transmission electron microscopy) 및 BMD(bulk micro defect)를 조사함으로써 알 수 있었다. 이온 주입에 의해 형성된 일차 결함의 제거 및 silicon 내부에서의 금속 gettering을 위하여 furnace 및 RTA (rapid thermal annealing)를 이용한 열처리를 행하였다. 이온주입 초기 상태 및 산소의 농도 또는 이온주입의 농도에 따른 결함을 살펴보기 위하여 DLTS를 이용하였으며, 또한 열처리에 따른 이러한 초기 결함들의 거동을 조사하여 TEM 및 BMD 결과와 비교, 분석하였다.