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Deep Level Trap Analysis of 4H-SiC PiN and SBD Diode  

Shin, Myeong-Cheol (Department of Electronic Materials Engineering, Kwangwoon University)
Byun, Dong-Wook (Department of Electronic Materials Engineering, Kwangwoon University)
Lee, Geon-Hee (Department of Electronic Materials Engineering, Kwangwoon University)
Shin, Hoon-Kyu (National Institute for Nanomaterials Technology (NINT), Pohang University of Science and Technology (POSTECH))
Lee, Nam-Suk (National Institute for Nanomaterials Technology (NINT), Pohang University of Science and Technology (POSTECH))
Kim, Seong Jun (National Institute for Nanomaterials Technology (NINT), Pohang University of Science and Technology (POSTECH))
Koo, Sang-Mo (Department of Electronic Materials Engineering, Kwangwoon University)
Publication Information
Journal of the Semiconductor & Display Technology / v.21, no.2, 2022 , pp. 123-126 More about this Journal
Abstract
We investigated deep levels in n-type 4H-SiC epitaxy layer of the Positive-Intrinsic-Negative diode and Schottky barrier diodes by using deep level transient spectroscopy. Despite the excellent performance of 4H-SiC, research on various deep level defects still requires a lot of research to improve device performance. In Positive-Intrinsic-Negative diode, two defects of 196K and 628K are observed more than Schottky barrier diode. This is related to the action of impurity atoms infiltrating or occupying the 4H-SiC lattice in the ion implantation process. The I-V characteristics of the Positive-Intrinsic-Negative diode shows about ~100 times lower the leakage current level than Schottky barrier diode due to the grid structures in Positive-Intrinsic-Negative. As a result of comparing the capacitance of devices diode and Schottky barrier diode devices, it can be seen that the capacitance value lowered if it exists the P implantation regions from C-V characteristics.
Keywords
4H-SiC; Deep level trap; Schoottky diode; PiN diode; DLTS;
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Times Cited By KSCI : 4  (Citation Analysis)
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