• Title/Summary/Keyword: conventional oxide method

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Densification of Cu-50%Cr Powder Compacts and Properties of the Sintered Compacts (Cu-50%Cr 분말성형체의 치밀화 및 소결체 물성)

  • 김미진;정재필;도정만;박종구;홍경태
    • Journal of Powder Materials
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    • v.7 no.4
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    • pp.218-227
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    • 2000
  • It is well known that the Cu-Cr alloys are very difficult to be made by conventional sintering methods. This difficulty originates both from limited solubility of Cr in the Cu matrix and from limited sintering temperature due to high vapor pressures of Cr and Cu components at the high temperature. Densification of Cu-50%Cr Powder compacts by conventional Powder metallurgy Process has been studied. Three kinds of sintering methods were tested in order to obtain high-density sintered compacts. Completely densified Cu-Cr compacts could be obtained neither by solid state sintering method nor by liquid phase sintering method. Both low degree of shrinkage and evolution of large pores in the Cu matrix during the solid state sintering are attributed to the anchoring effect of large Cr particles, which inhibits homogeneous densification of Cu matrix and induces pore generation in the Cu matrix. In addition, the effect of undiffusible gas coming from the reduction of Cu-oxide and Cr-oxide was observed during liquid phase sintering. A two-step sintering method, solid state sintering followed by liquid phase sintering, was proved to have beneficial effect on the fabrication of high-dendsity Cu-Cr sintered compacts. The sintered compacts have properties similar to those of commercial products.

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Fabrication and characterization of SILO isolation structure (SILO 구조의 제작 방법과 소자 분리 특성)

  • Choi, Soo-Han;Jang, Tae-Kyong;Kim, Byeong-Yeol
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.328-331
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    • 1988
  • Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

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Patterning of Diamond Micro-Columns

  • Cho, Hun-Suk;Baik, Young-Joon;Chung, Bo-Keon;Lee, Ju-Yong;Jeon, D.;So, Dae-Hwa
    • The Korean Journal of Ceramics
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    • v.3 no.1
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    • pp.34-36
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    • 1997
  • We have fabricated a patterned diamond field emitter on a silicon substrate. Fine diamond particles were planted on a silicon wafer using conventional scratch method. A silicon oxide film was deposited on the substrate seeded with diamond powder. An array of holes was patterned on the silicon oxide film using VLSI processing technology. Diamond grains were grown using a microwave plasma-assisted chemical vapor deposition. Because diamond could not grow on the silicon oxide barrier, diamond grains filled only the patterned holes in the silicon oxide film, resulting in an array of diamond tips.

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Passivation of Silicon Oxide Film Deposited at Low Temperature by Annealing in Nitrogen Ambient (저온공정 실리콘 산화막의 질소 패시베이션 효과)

  • Kim, Jun-Sik;Chung, Ho-Kyoon;Choi, Byoung-Deog;Lee, Ki-Yong;Yi, Jun-Sin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.334-338
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    • 2006
  • Poly silicon TFT requires high quality dielectric film; conventional method of growing silicon dioxide needs highly hazardous chemicals such as silane. We have grown high quality dielectric film of silicon dioxide using non-hazardous chemical such as TFOS and ozone as reaction gases by APCVD. The films grown were characterized through C-V curves of MOS structures. Conventional APCVD requires high temperature processing where as in the process of current study, we developed a low temperature process. Interface trap density was substantially decreased in the silicon surface coated with the silicon dioxide film after annealing in nitrogen ambient. The interface with such low trap density could be used for poly silicon TFT fabrication with cheaper cost and potentially less hazards.

Hot Petroleum Drying Method to the Preparation of Multicomponent Oxide Ceramic Material (다성분계 산화물의 요업재료 제조를 위한 석유 증발 건조 방법)

  • 변수일
    • Journal of the Korean Ceramic Society
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    • v.14 no.3
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    • pp.163-168
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    • 1977
  • As a wet chemical drying process "hot petroleum drying method" was applied and developed for preparing uniformly fine oxide powder with high purity and sinterreactivity. Using this method solution of sulfates was dried in hot petroleum bath (~17$0^{\circ}C$) to sulfate powder from which corresponding mullite doped by Fe3+ ion was formed. Particle size, shape, decomposition by heat, and phase identification of sulfate andoxide powders determined by DTA, TGA, X-ray diffraction, analysis and electron microscopy: sulfate powder prepared by this drying method is an intimate mixture of the amorphous form of uniformly and finely distributed spherical particles (0.05-0.1$\mu$). Mullitization with the sulfate powder occurs at 110$0^{\circ}C$ in air. The morphology of mullite particle made by firing the sulfate powder at 135$0^{\circ}C$ in oxygen atmosphere is granular of 0.1-0.3$\mu$ in size. This drying process proved to be a very effective method for preparing fine, homogeneous, and highly sinterreactive multicomponent oxide powder without conventional ceramic process of mixing, milling, and granulating. This process can be also applied for preparing electronic ceramic materials which are requisite for high purity and homogeneity.mogeneity.

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A Study on The Comparison of The Program Efficiency in The Conventional CHE Injection Method and a novel Hot Electron Injection Method Using A Substrate forward Bias (CHE 주입방법과 기판 순바이어스를 이용한 새로운 고온 전자 주입방법의 프로그램 효율성 비교에 관한 연구)

  • Zhang, Yong-Jie;An, Ho-Myoung;Kim, Hee-Dong;Kim, T.G.
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.1
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    • pp.1-5
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    • 2010
  • In this paper, we directly compare the program efficiency of conventional channel hot electron (CHE) injection methods and a novel hot electron injection methods using substrate forward biases in our silicon-oxide-nitride-oxide-silicon (SONOS) cell. Compared with conventional CHE injection methods, the proposed injection method showed improved program efficiency including faster program operation at lower bias voltages as well as localized trapping features for multi-bit operation with a threshold voltage difference of 1 V at between the forward and reverse read. This program method is expected to be useful and widely applied for future nano-scale multi-bit SONOS memories.

Homogeneous Liquid Crystal Alignment on Anisotropic YSnO Surface by Imprinting Method (임프린팅법을 이용한 YSnO 박막의 표면 이방성 획득과 액정 배향 특성 연구)

  • Oh, Byeong-Yun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.1
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    • pp.21-24
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    • 2020
  • We investigated a solution-driven Yttrium Tin Oxide (YSnO) film that was imprinted using a parallel nanostructure as a liquid crystal (LC) alignment layer. The imprinting process was conducted at the annealing temperature of 100℃. To evaluate the effect of this process, we conducted surface analyses including atomic force microscopy (AFM). During imprinting, the surface roughness was reduced, and anisotropic characteristics were observed. Planar LC alignment was observed at a pretilt angle of 0.22° on YSnO film. Surface anisotropy induced by imprinting method forces LC to align along the direction of the parallel nanostructure, which is an alternative to conventional polyimide treated using a rubbing process.

A study on the High Integrated 1TC SONOS Flash Memory (고집적화된 1TC SONOS 플래시 메모리에 관한 연구)

  • 김주연;이상배;한태현;안호명;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.26-31
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    • 2002
  • To realize a high integrated Flash memory utilizing SONOS memory devices, the NOR type 1TC(one Transistor Cell) SONOS Flash arrays are fabricated and characterized. This SONOS Flash arrays with common source lines are designed and fabricated by conventional 0.35$\mu\textrm{m}$ CMOS process. The thickness of ONO for memory cell is tunnel oxide of 34${\AA}$, nitride of 73${\AA}$ and blocking oxide of 34${\AA}$. To investigate operating characteristics, CHEI(Channel Hot Electron Injection) method and Bit line erase method are selected as the write operation and the erase method, respectively. The disturbance characteristics according to the write/erase/read cycling are also examined. The degradation characteristics are investigated and then the reliability of SONOS flash memory is guaranteed.

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Fuel Cell Performance by the Impedance Method (연료전지의 임피던스방법 적용 연구)

  • Kim, Gwi-Yeol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.510-511
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    • 2008
  • Fuel cell is a modular, high efficient and environmentally energy conversion device, it has become a promising option to replace the conventional fossil fuel based electric power plants. The high temperature fuel cell has conspicuous feature and high potential in being used as an energy converter of various fuel to electricity and heat. And, The research and development for the solid oxide fuel cell have been promoted rapidly and extensively in recent years, because of their high efficiency and future potential. Therefore this paper describes the manufacturing method and characteristics of anode electrode for solid oxide fuel cell, by the way, Ni-YSZ materials are used as anode of high temperature widely. So in this experiments, we investigated the optimum content of Ni, by the impedance characteristics, overvoltage. As a result, the performance of Ni-YSZ anode(40vol%) was better excellent than the others.

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Structural and Dielectric Properties of (Sr.Ca)$TiO_3$-based Ceramics with the Substitution of Ca (Ca 치환에 따른 (Sr.Ca)$TiO_3$계 세라믹스의 구조적 및 유전 특성)

  • 최운식;강재훈;서용진;김창일;김충혁;박용필
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.11
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    • pp.879-884
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    • 2001
  • In this paper, the structural and dielectric properties of (Sr$_{l-x}$Ca$_{x}$)TiO$_3$ (0$\leq$x$\leq$0.2) -based grain boundary layer ceramics were investigated by XRD, SEM and HP4194A. The ceramics were fabricated by the conventional mixed oxide method. The sintering temperature and time were 1420~152$0^{\circ}C$ and 4 hours, respectively. The average grain size and the lattice constant were decreased with increasing content of Ca. The average grain size was increased with increase of sintering temperature. The relative density of all specimens was 96~98%. The 2nd Phase formed by the thermal diffusion of CuO from the surface leads to very excellent dielectric properties, that is, $\varepsilon$$_{r}$>50000, tan $\delta$<0.05, $\Delta$C<$\pm$10%. The appropriate Ca content was under 15 ㏖%.s under 15 ㏖%.%.

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